2006
DOI: 10.1016/j.microrel.2005.10.008
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Study of CDM specific effects for a smart power input protection structure

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Cited by 8 publications
(6 citation statements)
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References 12 publications
(27 reference statements)
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“…As reported in [7], the arc resistance which occurs when the pogo pin of the CDM tester approaches the package pin influences the discharge behavior. To account for the resulting slightly reduced discharge current and the slower rise time of the discharge current, the arc model developed by Pommerenke and Aidam [13] was implemented in the simulation setup.…”
Section: Cdm Circuit Simulation Setupmentioning
confidence: 90%
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“…As reported in [7], the arc resistance which occurs when the pogo pin of the CDM tester approaches the package pin influences the discharge behavior. To account for the resulting slightly reduced discharge current and the slower rise time of the discharge current, the arc model developed by Pommerenke and Aidam [13] was implemented in the simulation setup.…”
Section: Cdm Circuit Simulation Setupmentioning
confidence: 90%
“…The substrate was neglected for the simulations. In a previous study [7], we demonstrated that accounting for the substrate connection of devices and the substrate resistance can be indispensable for simulating the behavior of an integrated circuit during a CDM discharge correctly. In this work, we studied the influence of parasitic elements, such as interconnect resistance, parasitic capacitances and inductances, and the substrate on the simulation results.…”
Section: Investigation Of Parasitics Influencementioning
confidence: 99%
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