Study of a single dangling bond at the SiO2/Si interface in deep submicron metal–oxide–semiconductor transistors

Abstract

Two-level charge pumping (CP) measurements have been used for the study of a single trap situated at the SiO2/Si interface of sub-100 nm metal–oxide–semiconductor transistors (50 nm length). At room temperature, we have measured the emission time constant (τ) of the single trap and verified that the generation-recombination process was consistent with the Shockley–Read–Hall theory. Temperature-dependent CP measurements have been used to determine the thermal variation of the emission time constant. We show that an Arrhenius plot of the emission time constant versus the temperature (τxT2 vs 1/T) allows the determination of the capture cross section and energy position of the trap within the silicon band gap. The single trap, which has been characterized here, is shown to be the well-known donor Pb0 center (dangling bond) at the SiO2/Si (100) interface.

Charge pumping current from single Si/SiO2interface traps: Direct observation ofPbcenters and fundamental trap-counting by the charge pumping method

“…4. It has been reported that I CPMAX ≤fq for a single trap [4]- [7]. However, we successfully observed cases of I CPMAX =2fq as shown in Fig.…”

Silicon Single-Electron Pump and Turnstile: Interplay with Crystalline Imperfections

“…In this method, we apply ac bias to the gate, just like we do in the metal-based turnstile, and measure the interface-defect mediated current flowing between the two terminals (one usually the source and the other the substrate) for conventional bulk MOS transistors. Several studies followed [31][32][33][34], and surprisingly, they all were done at room temperature or even above it, showing the power of the charge-transfer scheme employing natural defects. By reducing the size of the transistor, N is expected to finally reach unity, and the single-charge transfer synchronized with the gate clock can be realized.…”

“…We will need a cross section comparable to or larger than the values for the interface defects, which is on the order of 10 -16 -10 -17 cm 2 or larger [32][33][34]36]. First, the dopant must have a large capture cross section both for electrons in the conduction band and for holes in the valence band.…”

Accurate measurements of the charge pumping current due to individual MOS interface traps and interactions in the carrier capture/emission processes

“…The observation of single traps at the interface has been demonstrated by the CP method using submicron MOSFETs [2][3], and the trap capture cross sections for electrons and holes have been derived for particular traps [4]. Moreover, the capture cross sections for electrons and holes, and the energy level of particular interface traps have been examined by utilizing the three-voltage level CP method [5] using deep-submicron MOSFETs [6][7].…”