Structures and Materials of System-in-Package: A Review

Abstract

Background: As a new type of advanced packaging and system integration technology, System-in-Package (SiP) can realize the miniaturization and multi-functionalization of electronic products and is listed as an important direction of development by International Technology Roadmap for Semiconductors (ITRS). <P> Objective: This paper mainly introduces and discusses recent academic research and patents on package structure and packaging materials. Additionally, the trending of development is described. <P> Methods: Firstly, we analyze and summarize the challenges and existing problems in SiP. Then the corresponding solutions are introduced with respect to packaging structure and packaging materials. Finally, the research status of SIP and some patents in these aspects is reviewed. <P> Results: In order to increase the density of internal components, SiP products need to use a stacked structure. The cause of different performance in SiP products are: 1) the stress concentration and bonding quality problems caused by the chip stack structure; 2) the warpage and package thickness problems caused by the package stack; 3) Thermal conductivity of materials and thermal mismatch between materials; 4) Dielectric properties and thermomechanical reliability of materials. The following solutions are summarized: 1) Structural optimization of chip stacking and packaging stacking; 2) Application of new packaging technology; 3) Optimization of packaging materials; 4) Improvement of packaging material processing technology. <P> Conclusion: With the study of packaging structure and packaging materials, SiP can meet the requirements of the semiconductor industry and have great future prospects

Delamination of Plasticized Devices in Dynamic Service Environments

“…Researchers’ studies on delamination mechanisms have mainly focused on thermal stress damage and moisture damage. Explaining the delamination phenomenon from the stress–strain perspective alone, it has been found that, at the delamination interface, mainly due to the interface between the two phases of the material, the plastic deformation of the two-phase material is formed under the action of the alternating shear stress, which ultimately leads to the failure of delamination [ 8 , 9 , 10 , 11 , 12 , 13 , 14 ]. At the same time, under the intrusion of moisture, ionic contaminants corrode the chip, and moisture thermal expansion is also the main reason for the device to appear to suffer from the “popcorn” effect [ 15 , 16 , 17 , 18 , 19 ].…”

Full-size visual inspection system and method for semiconductor packaging lead-frame

“…Therefore, its production and quality inspection technology become particularly important. As the chip carrier of integrated circuit, the semiconductor lead frame is a key structural part that can realize the electrical connection between the internal circuit lead and the external lead by means of bonding materials (gold wire, aluminum wire, copper wire) and form an electrical circuit [4][5][6]. Its main functions include connection with external circuits, heat dissipation, mechanical support, etc.…”