Structural and electrical analysis of the atomic layer deposition of HfO2/n-In0.53Ga0.47As capacitors with and without an Al2O3 interface control layer

Abstract

High mobility III-V substrates with high-k oxides are required for device scaling without loss of channel mobility. Interest has focused on the self-cleaning effect on selected III-V substrates during atomic layer deposition of Al2O3. A thin (∼1 nm) Al2O3 interface control layer is deposited on In0.53Ga0.47As prior to HfO2 growth, providing the benefit of self-cleaning and improving the interface quality by reducing interface state defect densities by ∼50% while maintaining scaling trends. Significant reductions in leakage current density and increased breakdown voltage are found, indicative of a band structure improvement due to the reduction/removal of the In0.53Ga0.47As native oxides.

An investigation of capacitance-voltage hysteresis in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors

“…Due to the reported "self-cleaning" effect of the ALD process to form the Al 2 O 3 , removal of the interfacial oxide between the Al 2 O 3 and In 0.53 Ga 0.47 As is possible, with improved electrical performance as a result. 30,[36][37][38][39] The charge trapping level estimated for Al 2 O 3 (8 nm)/n-In 0.53 Ga 0.47 As MOS capacitors with no Al 2 O 3 /In 0.53 Ga 0.47 As interface layer, using either high (Ni/Au) or low (Al) work function gates is of a level which is around one order of magnitude lower than the typical interface state density in high-k/In 0.53 Ga 0.47 As MOS system. Table II summaries To further examine the physical location and distribution of the trapped charge, C-V hysteresis was measured as a function of oxide thickness series for (a) n-type and (b) ptype Pd/Al 2 O 3 (5-20 nm)/In 0.53 Ga 0.47 As MOS capacitors.…”

“…The following dielectric constant values were adopted, HfO 2 (21), 28 Al 2 O 3 (8.6), 23 and the native oxide of In 0.53 Ga 0.47 As (9). 29,30 …”

A systematic study of (NH4)2S passivation (22%, 10%, 5%, or 1%) on the interface properties of the Al2O3/In0.53Ga0.47As/InP system for n-type and p-type In0.53Ga0.47As epitaxial layers

“…2͑a͒, 2͑c͒, and 2͑d͒, has been reported for different n-In 0.53 Ga 0.47 As surface preparations, different high-k oxide layers, different high-k deposition methods, and for samples with and without interlayer oxides. 2,5,7,[17][18][19] This indicates that the dominant interface defect originates from the In 0.53 Ga 0.47 As surface, as opposed to the interfacial layer or high-k oxide, with vacancies or surface As-dimers as the possible origin of the interface states. However, for the 10% n-type device in Fig.…”

“…With regard to the 22%, 5%, and 1% devices, the frequency dispersion, with a broad peak response observed for V gate in the range of Ϫ0.25 to Ϫ2 V, is typical of that commonly observed in the literature for n-type In 0.53 Ga 0.47 As. 2,5,7,[17][18][19] This is characteristic of interface defects with a peak density at a specific energy in the In 0.53 Ga 0.47 As band gap and is unlikely to be representative of true inversion at the Al 2 O 3 / n-In 0.53 Ga 0.47 As interface. 17 True inversion at the Al 2 O 3 / In 0.53 Ga 0.47 As interface would result in a constant capacitance as a function of V gate , where the magnitude of this constant capacitance region increases with increasing temperature or decreasing measurement frequency up to a maximum value set by the oxide capacitance ͑C ox ͒.…”

Analysis of the minority carrier response of n-type and p-type Au/Ni/Al2O3/In0.53Ga0.47As/InP capacitors following an optimized (NH4)2S treatment

“…Analysis of the minority carrier response of n-type and p-type Au/Ni/Al 2 [1][2][3][4][5][6][7] In the case of p-type In 0.53 Ga 0.47 As, at positive gate bias, CV characteristics consistent with a midgap interface state response have been observed. [8][9][10][11] Recently, Trinh et al 12 and Lin et al 7 presented CV responses consistent with true minority carrier behaviour for n-In 0.53 Ga 0.47 As and p-In 0.53 Ga 0.47 As, respectively.…”