Strategies to Ensure Electromigration Reliability of Cu/Low-k Interconnects at 10 nm

Abstract

A key element for future silicon IC technology development is the containment of electromigration -induced failure of Cu / low-k interconnects. Continued progress in meeting electromigration reliability requirements for future technology nodes will require a multi-faceted approach to the problem: first the development of effective process solutions to limit the impact of technology scaling on electromigration life-time reduction; and second, the provision of models of failure that are representative of circuit operation to determine realistic current-limiting design rules. We will show that process solutions involve limiting the rate of transport along interfaces and grain boundaries in the damascene trench architecture using metal capping layers and Cu alloys. Most models of electromigration failure have been developed using DC stress conditions, while circuits predominantly operate with non-DC (pulsed DC or AC) signals. Understanding the relationship between failure under DC and non-DC conditions is a necessary aspect of realistic reliability characterization. In this paper we review: our recent studies that establish the relationship between Cu microstructure, metallic capping and dilute Cu alloy additions and thereby identify effective scenarios for mitigation with technology scaling; and experimental studies of electromigration failure under non-DC stress that explore the physical mechanisms involved. Electromigration failure of interconnects has been a long-standing concern for the development of highly reliable integrated circuits (IC). Despite intense efforts following the first observation of electromigration -related failure of Al circuit interconnects in 1966, 1 it has proven impossible to find a robust process solution by material modification for either Al or the more recently introduced Cu metal system. It remains an issue that can only be partially mitigated with process solutions, and ultimately it is controlled at the circuit level by the use of current limiting design rules. There is a prevalent concern that this method of control of the rate of electromigration failure will be detrimental to circuit performance. Therefore, during technology development, a balance must be found to ensure circuit performance is maintained without seriously impairing electromigration reliability. Achieving this balance requires a thorough fundamental understanding of the factors that determine the efficacy of process mitigation techniques. Moreover, current limiting design rules are extrapolated from accelerated test data using models of the failure mechanism, and the models must accurately reflect the physical mechanisms of failure.For the most advanced Si process technologies currently being manufactured with Cu and low-k dielectrics, electromigration failure times have decreased rapidly with technology progression, adding urgency to the problem of assuring electromigration reliability. Fig. 1 shows the reduction in failure time for both long conductor lengths and for shorter lengths; 2,3 for the latter, the Bl...

1/f noise measurements for faster evaluation of electromigration in advanced microelectronics interconnections

“…Electromigration in copper lines has long been believed to be dominated by diffusion at the copper-dielectric cap interface, but as the line widths decrease and the samples become increasingly polycrystalline, grain boundary diffusion has been suggested as the dominant EM failure mechanism. [35][36][37][38] This is also confirmed by the activation energies found with the 1/f noise measurements. The values also correspond well to the activation energies typically linked to grain boundary diffusion in Cu.…”

Electromigration and the structure of metallic nanocontacts

“…Mn and Al solutes in Cu have been investigated (Hu et al, 2012 andOates, 2015). It was found that both elements generally enhance electromigration.…”

“…This is equivalent to stronger Cu-Cu chemical bonds and in consequence larger energy barriers for diffusion and electromigration. Today, electromigration is still an important point for reliability (Oates, 2015). Already today, parts of local interconnects are from W with even higher melting temperature for improved electromigration resistance and further steps such as replacing Cu by W in thin film interconnects (lines) are discussed (Beyne et al, 2016).…”

Electromigration-Aware Interconnect Design

“…EM degradation in Cu wires occurs due to the nucleation and growth of voids [12,29], which results in an increase in the wire resistance and ultimately causes functional failure. Fig.…”