Strategies for the Synthesis of Fast Algorithms for the Computation of the Matrix-vector Products

Cariow, Aleksandr

doi:10.7726/jspta.2014.1001

Cited by 22 publications

(19 citation statements)

References 12 publications

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“…2 contain symmetric and bisymetric structures that allow the further simplification of the number of operations [40].…”

Section: And Wmentioning

confidence: 99%

Fast 10-Point DFT Algorithm for Power System Harmonic Analysis

Papliński¹,

Cariow²

2021

Applied Sciences

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This article presents an efficient algorithm for computing a 10-point DFT. The proposed algorithm reduces the number of multiplications at the cost of a slight increase in the number of additions in comparison with the known algorithms. Using a 10-point DFT for harmonic power system analysis can improve accuracy and reduce errors caused by spectral leakage. This paper compares the computational complexity for an L×10M-point DFT with a 2M-point DFT.

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“…2 contain symmetric and bisymetric structures that allow the further simplification of the number of operations [40].…”

Section: And Wmentioning

confidence: 99%

Fast 10-Point DFT Algorithm for Power System Harmonic Analysis

Papliński¹,

Cariow²

2021

Applied Sciences

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“…Points where lines converge denote summation (adders in the case of hardware implementation) and dotted lines indicate the sign-change data paths (data paths with multiplication by −1) . We use the usual lines without arrows on purpose, so as not to clutter the picture [23]. As it can be seen, the calculation of 2-point linear convolution requires only three multiplications and three additions.…”

Section: Algorithm For N =mentioning

confidence: 99%

“…where I N is an identity N × N matrix, H 2 is the (2 × 2) Hadamard matrix, and sign ,"⊕" denotes direct sum of two matrices [23][24][25].…”

Section: Algorithm For N =mentioning

confidence: 99%

Some Algorithms for Computing Short-Length Linear Convolution

Cariow

Papliński

2020

Electronics

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In this article, we propose a set of efficient algorithmic solutions for computing short linear convolutions focused on hardware implementation in VLSI. We consider convolutions for sequences of length N= 2, 3, 4, 5, 6, 7, and 8. Hardwired units that implement these algorithms can be used as building blocks when designing VLSI -based accelerators for more complex data processing systems. The proposed algorithms are focused on fully parallel hardware implementation, but compared to the naive approach to fully parallel hardware implementation, they require from 25% to about 60% less, depending on the length N and hardware multipliers. Since the multiplier takes up a much larger area on the chip than the adder and consumes more power, the proposed algorithms are resource-efficient and energy-efficient in terms of their hardware implementation.

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“…From the symmetry of the DFrFT matrix follows that for any value of the parameter α, the matrix F α 2 contains the same elements on the secondary diagonal. Therefore [17], the number of multiplications in the calculation of the two-point DFrFT can be reduced.…”

Section: Computing the Two-point Dfrftmentioning

confidence: 99%

Some Structures of Parallel VLSI-Oriented Processing Units for Implementation of Small Size Discrete Fractional Fourier Transforms

2019

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Discrete orthogonal transforms such as the discrete Fourier transform, discrete cosine transform, discrete Hartley transform, etc., are important tools in numerical analysis, signal processing, and statistical methods. The successful application of transform techniques relies on the existence of efficient fast algorithms for their implementation. A special place in the list of transformations is occupied by the discrete fractional Fourier transform (DFrFT). In this paper, some parallel algorithms and processing unit structures for fast DFrFT implementation are proposed. The approach is based on the resourceful factorization of DFrFT matrices. Some parallel algorithms and processing unit structures for small size DFrFTs such as N = 2, 3, 4, 5, 6, and 7 are presented. In each case, we describe only the most important part of the structures of the processing units, neglecting the description of the auxiliary units and the control circuits.

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Strategies for the Synthesis of Fast Algorithms for the Computation of the Matrix-vector Products

Cited by 22 publications

References 12 publications

Fast 10-Point DFT Algorithm for Power System Harmonic Analysis

Fast 10-Point DFT Algorithm for Power System Harmonic Analysis

Some Algorithms for Computing Short-Length Linear Convolution

Some Structures of Parallel VLSI-Oriented Processing Units for Implementation of Small Size Discrete Fractional Fourier Transforms

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