Statistical model for stress-induced leakage current and pre-breakdown current jumps in ultra-thin oxide layers

Degraeve, R.; Kaczer, B.; Schuler, F.; Lorenzini, Marilinda; Wellekens, D.; Hendrickx, Paul; Houdt, J. Van; Haspeslagh, L.; Tempel, G.; Groeseneken, G.

doi:10.1109/iedm.2001.979447

Cited by 23 publications

(11 citation statements)

References 3 publications

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“…At low defect densities, a one-to-one correlation would be expected. At high defect densities (and this may be the range studied here), it is possible that tunneling through multiple defects may further enhance the TAT process [15,16]. If this applies, the interpretation of the activation energy, E a , may differ from what is proposed above.…”

Section: Defect Creation and Correlation Between Silc Formation Anmentioning

confidence: 82%

Stress-induced leakage current and defect generation in nFETs with HfO<inf>2</inf>/TiN gate stacks during positive-bias temperature stress

Cartier

Kerber

2009

2009 IEEE International Reliability Physics Symposium

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The stress-induced leakage current (SILC) in nFETs with SiO 2 /HfO 2 /TiN dual-dielectric gate stacks with metal electrodes is studied during positive-bias temperature stress at high temperatures and at high gate stress voltage. It is shown that strong defect creation in the HfO 2 causes a linear increase of the SILC with stress time. The SILC generation is found to be thermally activated with an activation energy, E a ~ 1 eV. In addition, the SILC formation exhibits a strong correlation with the threshold voltage (V t ) instability ΔI g /I g ~ dV t 3 . Both degradation phenomena show a strong hysteretic behavior with gate bias; the SILC and V t -degradation are observed to be substantially reduced by applying a negative gate bias after stress. All these observations may be rationalized in terms of charge trapping in shallow HfO 2 defects -such as oxygen vacancy -and by the generation of new shallow defects during stress. The defect generation process has a low activation energy, likely because of thin-film effects. Therefore, the SILC and the V t instability are large under accelerated TDDB test conditions. It is also shown that the observed low activation energy in combination with the reversibility of the SILC has important implications for dielectric breakdown detection in dual-dielectric gate stacks.

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Section: Defect Creation and Correlation Between Silc Formation Anmentioning

confidence: 82%

Stress-induced leakage current and defect generation in nFETs with HfO<inf>2</inf>/TiN gate stacks during positive-bias temperature stress

Cartier

Kerber

2009

2009 IEEE International Reliability Physics Symposium

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“…This leakage current is about one order of magnitude larger than that registered in reference oxides, suggesting that the conduction mechanism could be different. To interpret its origin, we have considered the model proposed in [29], which explains the current observed in SiO 2 gate oxides after stress, before breakdown. In [29] it was demonstrated that, due to the electrical stress, the leakage current can be explained in terms of TAT through a percolation path defined by the alignment of two traps (Fig.…”

Section: Resultsmentioning

confidence: 99%

Charge storage in Si nanocrystals embedded in SiO 2 with enhanced C-AFM

et al. 2005

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A Conductive Atomic Force Microscope (C-AFM) has been used to investigate the nanometer scale electrical properties of Metal-Oxide-Semiconductor (MOS) memory devices with Silicon nanocrystals (Si-nc) embedded in the gate oxide. This study has been possible thanks to the high lateral resolution of the technique, which allows to characterize areas of only few hundreds of nm 2 and, therefore, the area that contains a reduced number of Si-nc. The results have demonstrated the capability of the Si-nc to enhance the gate oxide electrical conduction due to trap assisted tunneling. On the other hand, Si-nc can act as trapping centers. The amount of charge stored in Si-nc has been estimated through the change induced in the barrier height measured from the I-V characteristics. The results show that only ~20% of the Si-nc are charged. These nanometer scale results are consistent with those obtained during the macroscopic characterization of the same structures. Therefore, C-AFM has been shown to be a very suitable tool to perform a detailed investigation of the performance of memory devices based on MOS structures with Si-nc at such reduced scale.

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“…During the buildup of traps in a dielectric, the prebreakdown Weibull slope is characterized by the number of traps in the percolation paths within the oxide. [9][10][11] For example, very early in a stress where the trap generation rate is 0.5, conduction through single trap conduction paths dominates and consequently the measured t BD Weibull slope will be 0.5. As the stress continues and the leakage current increases, the Weibull slope will reflect the onset of conduction through chains of 2 or more traps and if we examine several subsequent current steps, we can construct a plot of ␤ versus current step height as shown schematically in Fig.…”

Section: Resultsmentioning

confidence: 99%

Degradation and breakdown characteristics of thin MgO dielectric layers

O’Connor

Hughes

Casey

et al. 2010

Journal of Applied Physics

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MgO has been suggested as a possible high-k dielectric for future complementary metal-oxide semiconductor processes. In this work, the time dependent dielectric breakdown ͑TDDB͒ characteristics of 20 nm MgO films are discussed. Stress induced leakage current measurements indicate that the low measured Weibull slopes of the TDDB distributions for both n-type and p-type devices cannot be attributed to a lower trap generation rate than for SiO 2 . This suggests that much fewer defects are required to trigger breakdown in MgO under voltage stress than is the case for SiO 2 or other metal-oxide dielectrics. This in turn explains the progressive nature of the breakdown in these films which is observed both in this work and elsewhere. The reason fewer defects are required is attributed to the morphology of the films.

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Statistical model for stress-induced leakage current and pre-breakdown current jumps in ultra-thin oxide layers

Cited by 23 publications

References 3 publications

Stress-induced leakage current and defect generation in nFETs with HfO<inf>2</inf>/TiN gate stacks during positive-bias temperature stress

Stress-induced leakage current and defect generation in nFETs with HfO<inf>2</inf>/TiN gate stacks during positive-bias temperature stress

Charge storage in Si nanocrystals embedded in SiO 2 with enhanced C-AFM

Degradation and breakdown characteristics of thin MgO dielectric layers

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