Statistical Analysis of Power Grid Networks Considering Lognormal Leakage Current Variations with Spatial Correlation

Abstract

Abstract-As the technology scales into 90nm and below, process-induced variations become more pronounced. In this paper, we propose an efficient stochastic method for analyzing the voltage drop variations of on-chip power grid networks, considering log-normal leakage current variations with spatial correlation. The new analysis is based on the Hermite polynomial chaos (PC) representation of random processes. Different from the existing Hermite PC based method for power grid analysis, which models all the random variations as Gaussian processes without considering spatial correlation. The new method focuses on the impacts of stochastic sub-threshold leakage currents, which are modeled as log-normal distribution random variables, on the power grid voltage variations. To consider the spatial correlation, we apply orthogonal decomposition to map the correlated random variables into independent variables. Our experiment results show that the new method is more accurate than the Gaussian-only Hermite PC method using the Taylor expansion method for analyzing leakage current variations, and two orders of magnitude faster than the Monte Carlo method with small variance errors. We also show that the spatial correlation may lead to large errors if not being considered in the statistical analysis.

Statistical Analysis of On-Chip Power Delivery Networks Considering Lognormal Leakage Current Variations With Spatial Correlation

“…For two independent Gaussian variables, we have (15) Assuming that we have a similar second-order Hermite PC for input leakage current ,…”

Voltage drop reduction for on-chip power delivery considering leakage current variations

“…Combining eq. (1) and (9), the mean and variance of node voltages, v(t), can be obtained after some math calculations [13].…”

Variational capacitance modeling using orthogonal polynomial method

“…Galerkin-based Spectral stochastic method has been applied for statisitical interconenct modeling [14,1] and on-chip power grid analysis consider process variations in the past [9,8].…”