Static logic implication with application to redundancy identification

Abstract

This paper presents a new static logic implicationalgorithm. An improved implication procedure that fully takes advantage of the special context of static implication, the iterative method, and set algebra is described. The algorithm discovers at low cost many indirect implications which are not discovered by dynamic learning without tremendous time cost. The experimental results show that a very large number of indirect implications are found by our algorithm. The static implication procedure has many useful applications, one of which is static redundancy identification. Use of the static implications obtained from the algorithm in static redundancy identification for IS-CAS85 combinational circuits resulted in a larger number of redundant faults identified than in previous methods. I IntroductionStatic logic implication, also called static learning[l], is a procedure which performs implications on both value assignments (0 and 1) for all nodes of a circuit. It is often included in the preprocessing phase of test generation and other applications [1]-[6]. For example, it is used in ATPG to avoid repetitive computation of signal assignments and accelerate the test pattern generation. Since the usual direct implications made by forward and backward propagation can be quickly determined during the dynamic learning phase, the emphasis of static learning should be put on indirect implications, those necessary assignments that cannot be found by simple forward and backward signal propagation [2]. Indirect iniplications play a critical role in many processes, such as multi-level logic optimization [4], redundancy identification [7][8], ATPG [2], and logic verification. A vast majority of indirect implications, especially unilateral indirect implications[2], can be easily found in static learning using the contrapositive law, while it is difficult, and sometimes practically impossible, to discover them in dynamic learning. Some 'This research was supported in part by the Semiconductor Research Corporation under contract SRC 96-DP-109, in part by DARPA under contract DABT63-95-C-0069, and by HewlettPackard under an equipment grant.previous work [9] in ATPG also showed that with a complete and efficient preprocessing phase, dynamic calculation of the logical dependencies among nodes is not required to process the vast majority of faults. Therefore, static learning is a very important preprocessing step.A number of papers have dealt with implication procedures [1]-[4][9]-[12]. The learning procedures described in [3] and [5] can discover some indirect implications, but they are not sufficient for identifying large numbers of indirect implications. Rajski and Cox used a 16-value logic algebra and reduction list method to determine necessary assignments [9]. Chakradhar and Agrawal proposed a novel transitive closure based algorithm, which guarantees the identification of all implications of a partial set of node values [lO][ll]. The advantage of the algorithms proposed in [9]-[ll] is that they not only identify necessary va...

Enhancing SAT-based equivalence checking with static logic implications

“…Therefore, f=O -t m=O is an extended backward implication of (r: 0). and is appended to the list imp/ 01 Intuitively, extended backward implications help to identify the hard-to-firid implications, and hence are effective for various applications such as capturing additional untestable faults [9, 101. It must be mentioned here that the concept of extended backward implications [9] is different from Recursive Learning [16, 171 of level (depth) '1'. The relations obtained through extended backward implications may take quite a few levels of recursion by the Recursive Learning 11) } procedure.…”

“…However, they preprocessed the CNF formula using only depth '1' recursive learning which is different from extended backward implications [9] used in our approach. Hence, even if the computational time reported in their experimental results was scaled down, our technique will still be superior.…”

A fast sequential learning technique for real circuits with application to enhancing ATPG performance

“…Learning is used in several areas of computer-aided design, most notably automatic test pattern generation (ATPG) [1][2][3][4][5], redundancy identification [2,6], logic verification [7], and logic optimization [8]. Although this paper focuses on the application of the learning method to ATPG, the proposed method is not restricted to test generation.…”

“…Learning relations in a circuit is typically performed by injecting both logic values on a gate and propagating them backward and forward. This can be done either statically in a pre-processing phase [1,2], or dynamically during the search process [3]. Dynamic learning can extract significantly more implications since the learning is done in the presence of assignments that have already been made, which allows the search space to be pruned further.…”

“…Note that most learning techniques are performed in the combinational logic of the circuit. Only [5] attempts learning of relations by extending the analysis across sequential elements, but the learning is only performed across two time frames.Learning is used in several areas of computer-aided design, most notably automatic test pattern generation (ATPG) [1][2][3][4][5], redundancy identification [2,6], logic verification [7], and logic optimization [8]. Although this paper focuses on the application of the learning method to ATPG, the proposed method is not restricted to test generation.…”