2020
DOI: 10.3390/nano10081555
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State of the Art and Future Perspectives in Advanced CMOS Technology

Abstract: The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones. Today’s transistors with 3D structure and integrated advanced strain engineering differ radically from the original planar 2D ones due to the scaling down of the gate and source/drain regions according to Moore’s law. This article presents a review of new architectures, simula… Show more

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Cited by 125 publications
(75 citation statements)
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“…Furthermore, 3D nanomagnets present several key features to postulate a paradigmatic solution to different challenges that the semiconductor industry must confront in the years to come to reconcile continued miniaturization, increasing performance and reduced power consumption [ 5 , 6 , 7 ]. The transition to 3D nanoarchitectures would overcome the intrinsic areal density limitations of conventional CMOS technologies caused by increasing leakage currents due to quantum effects [ 8 ]. They may also reduce the power consumption by storing and processing memory by ultrafast magnetic domain walls or skyrmions driven by low-power spin currents [ 9 , 10 , 11 ].…”
Section: Introductionmentioning
confidence: 99%
“…Furthermore, 3D nanomagnets present several key features to postulate a paradigmatic solution to different challenges that the semiconductor industry must confront in the years to come to reconcile continued miniaturization, increasing performance and reduced power consumption [ 5 , 6 , 7 ]. The transition to 3D nanoarchitectures would overcome the intrinsic areal density limitations of conventional CMOS technologies caused by increasing leakage currents due to quantum effects [ 8 ]. They may also reduce the power consumption by storing and processing memory by ultrafast magnetic domain walls or skyrmions driven by low-power spin currents [ 9 , 10 , 11 ].…”
Section: Introductionmentioning
confidence: 99%
“…Since 1970, we saw the doubling of Si transistors inside the same integrated circuit area approximately every 2 years. This technological trend was discovered by Moore, and is known as Moore’s law [ 1 , 2 , 3 ]. However, the trend has started to change in the last decades, reaching the saturation regime due to the complexity of a further down-scaling.…”
Section: Introductionmentioning
confidence: 99%
“…Some new kinds of devices [ 14 , 15 , 16 ] have now been reported for MOSFET alternatives. Gate-all-around (GAA) silicon nanowire (Si NW) or nanosheet (NS) field effect transistor (FET) is regarded as the most likely candidate to replace FinFET in the next CMOS technology nodes [ 17 , 18 ], and has better gate control ability for scaling down with lower power dissipation and higher integration density as well as the application for cryo-CMOS. In addition, the quantum confinement effect will be more pronounced in the small-size GAA NW devices.…”
Section: Introductionmentioning
confidence: 99%