Stacked high-ε gate dielectric for gigascale integration of metal–oxide–semiconductor technologies

Abstract

Advances in lithography and thinner SiO2 gate oxides have enabled the scaling of metal–oxide–semiconductor technologies to sub-0.25 μm feature size. A major hurdle in the gate dielectric scaling using conventional thermally grown SiO2 has been excessive tunneling that occurs in ultrathin (<25 Å) SiO2. High dielectric constant materials such as Ta2O5 have been suggested as a substitute for SiO2. However, these materials have high concentrations of bulk fixed charge, unacceptable levels of Si–Ta2O5 interface trap states, and low silicon interface carrier mobilities. This letter summerizes an elegant solution to these issues through synthesis of a thermally grown SiO2(15 Å)–Ta2O5(30 Å)–SiO2(5–10 Å) dielectric with improvements in leakage, tunneling, charge trapping behavior, and interface substructure. Transistors fabricated using this stacked gate dielectric exhibit excellent subthreshold, saturation, and drive currents.

Growth of Lanthanum Silicate Thin Films by Liquid Injection MOCVD Using Tris[bis(trimethylsilyl)amido]lanthanum

“…At substrate temperatures higher than 550 C, the La-silicate growth rate decreases due to depletion of the precursor in the gas phase and on the reactor walls caused by radiative 4 (500±580 C), [20] Ta(NMe 2 ) 5 (400±500 C), [21] and t BuN=Ta(NEt 2 ) 3 (300±600 C). [22] The characteristics of the growth rate vs. substrate temperature curve depends on the specific reactor geometry and growth conditions as well as the thermal stability of the precursor, but similar growth onset temperatures (350 C) and similar maximum growth rate temperatures (500±550 C) have recently been observed for ZrO 2 4 (M = Zr, Hf). [25] Analysis of the films by scanning electron microscopy (SEM) showed that all the as-grown films were smooth and featureless on the micron scale, with no evidence of crystalline contrast in the film cross-section (see Fig.…”

“…The use of materials with a higher dielectric constant (k) than SiO 2 allows an equivalent capacitance to be achieved in a physically thicker insulating layer, and thicker layers should, in turn, provide reduced leakage currents. Therefore, there has been much recent research aimed at replacing the conventional SiO 2 gate dielectric with alternative high k dielectric oxides such as Al 2 O 3 , [3] Ta 2 O 5 , [4] TiO 2 , [5] ZrO 2 , [6] HfO 2 , [7] and La 2 O 3 , [8] and their related silicates.[2]Of these materials, lanthanum oxide, La 2 O 3 , has good potential due to its relatively high permittivity, [9] but unfortunately La 2 O 3 is chemically unstable in air, reacting with CO 2 to form La 2 (CO 3 ) 3 , [10] and adsorbing water to give LaO(OH) and La(OH) 3 by an extensive surface hydroxylation process. [11,12] This can result in oxygen vacancies and excess positive charge in the oxide film layer, leading to unwanted flat-band voltage shifts in the metal±oxide dielectric structure.…”

Synthesis of calcium copper titanate (CaCu3Ti4O12) nanowires with insulating SiO2 barrier for low loss high dielectric constant nanocomposites

“…The relatively low κ of SiO 2 (3.9) limits its use in transistors as gate lengths scale down to tens of nanometers [1][2][3][4]. This has motivated the development of high-κ dielectrics to allow further miniaturization of microelectronic components [3,4].…”

“…High dielectric constant (high-κ) materials are widely used in semiconductor manufacturing processes to replace traditional dielectric layer materials (silicon dioxide, silicon nitride) [1,2]. The relatively low κ of SiO 2 (3.9) limits its use in transistors as gate lengths scale down to tens of nanometers [1][2][3][4].…”

Stress-induced leakage currents of the RF sputtered Ta2O5 on N-implanted silicon

“…A possible way to minimize (even to prevent) the growth of SiO 2 -containing interfacial layer is a slight nitridation of Si before deposition of Ta 2 O 5 resulting to formation in fact of SiO x N y at the Si instead of SiO 2 [22][23][24]. SiO x N y is not only with higher k than SiO 2 , but it is expected to improve the reliability and immunity of the stack capacitor to hot electron degradation [25,26]. Among a number of methods for Si surface nitridation we used N-implantation in this work.…”