Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit

Abstract

As the minimum fabrication technology of CMOS transistor shrink down to 90nm or below, the high standby power has become one of the major critical issues for the SRAM-based FPGA circuit due to the increasing leakage currents in the configuration memory. The integration of MRAM in FPGA instead of SRAM is one of the most promising solutions to overcome this issue, because its nonvolatility and high write/read speed allow to power down completely the logic blocks in “idle” states in the FPGA circuit. MRAM-based FPGA promises as well as some advanced reconfiguration methods such as runtime reconfiguration and multicontext configuration. However, the conventional MRAM technology based on field-induced magnetic switching (FIMS) writing approach consumes very high power, large circuit surface and produces high disturbance between memory cells. These drawbacks prevent FIMS-MRAM's further development in memory and logic circuit. Spin transfer torque (STT)-based MRAM is then evaluated to address these issues, some design techniques and novel computing architecture for FPGA logic circuits based on STT-MRAM technology are presented in this article. By using STMicroelectronics CMOS 90nm technology and a STT-MTJ spice model, some chip characteristic results as the programming latency and power have been calculated and simulated to demonstrate the expected performance of STT-MRAM based FPGA logic circuits.

Spintronics: A contemporary review of emerging electronics devices

“…MTJ is a tunnel junction used for logic and memory applications, which combines magnetism, electronics and promises high read/write speed, non-volatility, infinite endurance [41] etc. MTJ nano-pillars are one of the important devices of spintronics.…”

A resistive TCAM accelerator for data-intensive computing

“…As a universal embedded memory candidate, STT-MRAM has a read speed as fast as SRAM [62], practically unlimited write endurance [4], and favorable de- [18]. lay and energy scaling characteristics [24].…”

High Performance SoC Design Using Magnetic Logic and Memory

“…A non-volatile configuration point of MLUTs consists of an SRAM based Sense Amplifier (SA) associated with a couple of complementary MTJs [29]. FPGA circuits can be configured instantaneously and the high-speed SA ensures nearly the same speed as SRAM-LUT [19][20][21][22][23][24]. Thanks to the small cell area and 3D integration of MRAM, multi-context can be easily implemented, allowing dynamical and run-time reconfiguration methods [26,29,37].…”

“…(a) 2D structure of CMOS logic (b) 3D structure of MRAM logic, the distance between logic and memory can be greatly reduced and then accelerate the computing speed MRAM based logic circuits (magnetic logic) were initiated in 2000 [18] and considered as a potential computing paradigm featuring high performances in terms of power, speed and area. Numerous academic and industry research groups joined this field since 2006 [19][20][21][22] and some Magnetic logic circuits have been presented and successfully prototyped, such as Magnetic Look-Up- Table (MLUT), Magnetic Flip-Flop (MFF) and embedded MRAM (eMRAM) as different levels of cache memory [15,23,24]. In this chapter, we describe an overview of the magnetic logic circuits and discuss their potential applications from both the physics and architecture points of view.…”