Specification of reduction strategies in term rewriting systems

Eekelen, M.C.J.D. van; Plasmeijer, M.J.

doi:10.1007/3-540-18420-1_57

Cited by 9 publications

(4 citation statements)

References 9 publications

(10 reference statements)

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“…Using sharing and lazy copying, different ways of lifting term rewriting systems to graph rewriting systems can be investigated. Other strategies than the functional strategy may be interesting (van Eekelen & Plasmeijer (1986)). For instance, adding reducers following a non-deterministic strategy may be useful for the specification of process control, including schedufing and inten~pts.…”

Section: Future Workmentioning

confidence: 99%

Parallel graph rewriting on loosely coupled machine architectures

Eekelen

Plasmeijer

Smetsers

1991

Conditional and Typed Rewriting Systems

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Graph rewriting models are very suited to serve as the basic computational model for functional languages and their implementation. Graphs are used to share computations which is needed to make efficient implementations of functional languages on sequential hardware possible. When graphs are rewritten (reduced) on parallel loosely coupled machine architectures, subgraphs have to be copied from one processor to another such that sharing is lost. In this paper we introduce the notion of lazy copying. With lazy copying it is possible to duplicate a graph without duplicating work. Lazy copying can be combined with simple mmotations which control the order of reduction. In principle, only interleaved execution of the individual reduction steps is possible. However, a condition is deduced under which parallel execution is allowed. When only certain combinations of lazy copying and annotations are used it is guarantied that this so-called non-interference condition is fulfilled. Abbreviations for these combinations are introduced. Now complex process behavlours, such as process communication on a loosely coupled parallel machine architecture, can be modelled. This also includes a special case: modelling mnltlprocessing on a single processor. Arbitrary process topologies can be created. Synchronous and asyncbronons process communication can be modelled. The implementation of the language Concurrent Clean, which is based on the proposed graph rewriting model, has shown that complicated parallel algorithms which can go far beyond divide-and-conquar like applications can be expressed. 1 I n t r o d u c t i o n Ideally, a computational model of a language is a formal model as close as possible to both its semantics and its implementation, still it models only the essential aspects of them. In the following paragraphs it is explained why Graph Rewriting Systems (GRS*s) are suited to serve as a computational model of functional languages and their implementations. After that, GRS's are extended in order to deal with parallel evaluation. Graph rewriting systems and functional languages Our prime interests are functional languages and their implementation on sequential and parallel hardware. Traditionally. the pure lambda calculus (Church (1932/3). Barendregt (1984)) is considered to be a suitable model for these languages. However, in our opinion, some important aspects of functional languages and the way they are usually implemented, cannot be modelled with this calculus. In particular, the calculus itself lacks pattern matching and the notion of sharing of computations. Patterns contain in'tportant information for strictness analyTers (Ntcker (1988)). Sharing of computations is essential to obtain efficient implementations on traditional hardware (Fasel & Keller (1986)). Graph Rewriting systems are based on pattern matching and sharing. We believe that compared to the X-calculus graph rewriting systems (Barendregt et al. (1987a,b)) are better suited to serve as computational model for functional languages. In the past we have...

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Section: Future Workmentioning

confidence: 99%

Parallel graph rewriting on loosely coupled machine architectures

Eekelen

Plasmeijer

Smetsers

1991

Conditional and Typed Rewriting Systems

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“…Another approach is to have a high level specification of strategies and a formalism for combining strategies during evaluation. This approach holds out promise for global reasoning [EEK86]. We believe that the way forward should involve a careful combination of these approaches.…”

Section: Merging Listsmentioning

confidence: 99%

Towards an intermediate language based on Graph Rewriting

Barendregt

Eekelen

Glauert

et al. 1987

Lecture Notes in Computer Science

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partially supported by the Dutch Parallel Reduction Machine Project. Abstract.Lean is an experimental language for specifying computations in terms of graph rewriting. It is based on an alternative to Term Rewriting Systems (TRS) in which the terms are replaced by graphs. Such a Graph Rewriting System (GRS) consists of a set of graph rewrite rules which specify how a graph may be rewritten. Besides supporting functional programming, Lean also describes imperative constructs and allows the manipulation of cyclic graphs. Programs may exhibit non-determinism as well as parallelism. In particular, Lean can serve as an intermediate language between declarative languages and machine architectures, both sequential and parallel.

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“…A Memory Bank (not shown in the figure) associated to each PM provides the storage capacity proper. Projects similar to MARS, going on in other countries, are Rediflow [1] (U.S.A.), FlagShip [2] and GRIP [3] (U.K.), and the Dutch parallel reduction machine project [4].…”

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confidence: 99%

MaRs: a parallel graph reduction multiprocessor

Castan

Contessa

Cousin

et al. 1988

SIGARCH Comput. Archit. News

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This paper is based on a project sponsored by the French Ministry of Defense (STPA) The authors are researchers at the Centre d'Etudes et Recherches de Toulouse, a department of ONERA, Office National d'Etudes et Recherches A6ronautiques.Abstract: We describe the MaRS machine: a parallel, distributed control multiprocessor for graph reduction using a functional machine language. The object code language is based on an optimized set of combinators, and its functional character allows an automatic parallelisation of the execution. A programming language, "MARS LISP", has also been developed. A prototype of MaRS is currently being designed in VLSI 1. 5-micron CMOS technology with 2 levels of metal, by means of a CAD system. The machine uses three basic types of processors for Reduction, Memory and Communication, plus auxiliary 1/0 and Arithmetic Processors; communications do not constitute an operational bottleneck, as interprocessor messages are routed via an Omega switching network. Initially, a HostComputer will be used for startup, testing and direct memory access. The machine architecture and its functional organization are described, as well as the theoretical execution model. We conclude on a number of specialized hardware and software mechanism that differentiate MaRS machine from other similar projects currently going on.

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Specification of reduction strategies in term rewriting systems

Cited by 9 publications

References 9 publications

Parallel graph rewriting on loosely coupled machine architectures

Parallel graph rewriting on loosely coupled machine architectures

Towards an intermediate language based on Graph Rewriting

MaRs: a parallel graph reduction multiprocessor

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