“…However, their approach is only applicable to systems that perform journaling and require changes to the application code. SpartanSSD [24], which is most related to this work, pinpoints capacitance constraints in scalable SSDs and reduces capacitance requirements by making use of elastic journaling. SpartanSSD logs the mapping information updates into the in-device journal so that the writes to the mapping table can be buffered.…”
This paper presents Hexa-SSD, a novel SSD-internal DRAM management scheme that allows the SSD capacity to scale beyond the slow growth of capacitors. Hexa-SSD judiciously manages the dirty memory footprint within the SSD-internal buffer by using a low-overhead data reordering scheme on the deep queues available in today's storage interfaces. In doing so, our design guarantees crash consistency while using a fraction of the capacitors compared to the state-of-the-art designs. We implement our design in FEMU and demonstrate that Hexa-SSD delivers up to 1.4× higher IOPS and up to 49% less write amplification compared to the existing scheme under power constraints.
“…However, their approach is only applicable to systems that perform journaling and require changes to the application code. SpartanSSD [24], which is most related to this work, pinpoints capacitance constraints in scalable SSDs and reduces capacitance requirements by making use of elastic journaling. SpartanSSD logs the mapping information updates into the in-device journal so that the writes to the mapping table can be buffered.…”
This paper presents Hexa-SSD, a novel SSD-internal DRAM management scheme that allows the SSD capacity to scale beyond the slow growth of capacitors. Hexa-SSD judiciously manages the dirty memory footprint within the SSD-internal buffer by using a low-overhead data reordering scheme on the deep queues available in today's storage interfaces. In doing so, our design guarantees crash consistency while using a fraction of the capacitors compared to the state-of-the-art designs. We implement our design in FEMU and demonstrate that Hexa-SSD delivers up to 1.4× higher IOPS and up to 49% less write amplification compared to the existing scheme under power constraints.
“…As you can see in Figure 2, power supply is switched from the external power source to the internal capacitor bank when a power-loss event is detected. Note that the amount of the capacitors required for the PLP is proportional to the size of the volatile buffer [6,7,18]. Typically, SSDs use an internal buffer to store not only user data but also meta data for FTL.…”
Section: Power-loss Protectionmentioning
confidence: 99%
“…However, the conventional block-interface SSD consumes most of volatile buffer to store a page-level mapping table with a size of 0.1% of the storage capacity. Therefore, the conventional SSDs use more than 97% of the DRAM buffer for the mapping table, while only a few megabytes can be used as a user data buffer [6]. As a result, the amount of capacitance required for PLP depends primarily on the size of the mapping table, not the size of the write buffer.…”
Section: Power-loss Protectionmentioning
confidence: 99%
“…However, the existing PLP method has two limitations. The first is that, as the capacity of the SSD increases, the capacity of the internal write buffer also increases, but the number of capacitors cannot be increased infinitely due to the limitation of the space inside the SSD and the unstable price of capacitor material (Tantalum) [6,7]. The second is that in the existing block device interface it is not possible to distinguish data that require persistence in the internal buffer.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, existing studies have mainly focused on minimizing the capacitance required to ensure the persistence of the mapping table in the event of a sudden power-off. SpartanSSD [6], the latest study on PLP, reduced the amount of the capacitance dramatically by recording a journal for mapping table updates and guaranteeing persistence only for the mapping table journal in case of sudden power-off. On the other hand, since the size of user data is negligible compared to the mapping table, it was not seriously considered in previous studies.…”
Most SSDs (solid-state drives) use an internal DRAM (Dynamic Random Access Memory) to improve the I/O performance and extend SSD lifespan by absorbing write requests. However, this volatile memory does not guarantee the persistence of buffered data in the event of sudden power-off. Therefore, highly reliable enterprise SSDs employ power-loss-protection (PLP) logic to ensure the durability of buffered data using the back-up power of capacitors. The SSD must provide enough capacitors for the PLP in proportion to the size of the volatile buffer. Meanwhile, emerging ZNS (Zoned Namespace) SSDs are attracting attention because they can support many I/O streams that are useful in multi-tenant systems. Although ZNS SSDs do not use an internal mapping table unlike conventional block-interface SSDs, a large write buffer is required to provide many I/O streams. The reason is that each I/O stream needs its own write buffer for write buffering where the host can allocate separate zones to different I/O streams. Moreover, the larger capacity and more I/O streams the ZNS SSD supports, the larger write buffer is required. However, the size of the write buffer depends on the amount of capacitance, which is limited not only by the SSD internal space, but also by the cost. Therefore, in this paper, we present a set of techniques that significantly reduce the amount of capacitance required in ZNS SSDs, while ensuring the durability of buffered data during sudden power-off. First, we note that modern file systems or databases have their own solutions for data recovery, such as WAL (Write-ahead Log) and journal. Therefore, we propose a selective power-loss-protection method that ensures durability only for the WAL or journal required for data recovery, not for the entire buffered data. Second, to minimize the time taken by the PLP, we propose a balanced flush method that temporarily writes buffered data to multiple zones to maximize parallelism and preserves the data in its original location when power is restored. The proposed methods are implemented and evaluated by modifying FEMU (QEMU-based Flash Emulator) and RocksDB. According to experimental results, the proposed selective-PLP reduces the amount of capacitance by 50 to 90% while retaining the reliability of ZNS SSDs. In addition, the balanced flush method reduces the PLP latency by up to 96%.
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