(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems

Abstract

Abstract--This paper presents an overview of test techniques that offer promising features when Built-In-Self-Test (BIST) must be applied to complex intgrated systems including analog, mixed-signal and RF parts. Emphasis is on techniques exhibiting a good trade-off between test requirements (basically in terms of signal accuracy and frequency) and test quality.

Low-cost signature test of RF blocks based on envelope response analysis

“…Let us consider the typical two-tone test (see Fig.1a), in which a non-linear RF device is driven by a signal x(t) composed of two equal-magnitude tones at different, but very close, frequencies, in the form, (1) where A is the amplitude of each test tone, and ω b is the frequency difference between them. Assuming, as it is the case in most situations, a third-order non-linear model for the RF block, the response y(t) of the system can be written as, (2) Expanding (2), and discarding the out-of-band components, the response y(t) can be expressed as [16], (3) In reference [15] we propose the analysis of the response envelope taking advantage of its frequency properties.…”

“…Their diverse specifications and high operating frequency, as well as the large impact of process variations in current deep sub-micron technologies, make necessary extensive tests that are complex and expensive to perform. Reducing RF test complexity and cost is still an open research topic that has been addressed in a number of different approaches [1]. Recent work in this area includes defect modeling and failure diagnosis [2]- [5], alternate test [5]- [6], DfT and BIST techniques [7]- [13], etc.…”

“…In particular, BIST techniques have been identified as a solution to mitigate RF test difficulties [1]. However, an efficient BIST technique has to fulfill requirements of robustness, low area overhead, low design effort, available programming capabilities to accommodate the test program to the target measurements, and low-speed interface needs with the external ATE.…”

Fully Differential 4-V Output Range 14.5-ENOB Stepwise Ramp Stimulus Generator for On-Chip Static Linearity Test of ADCs

“…Standard functional tests employ specialized Automated Test Equipment (ATE) for exciting the DUT with an appropriate test stimulus, acquiring the test response, and processing the test results. However, in a complex SoC/SiP -where the external access to the internal blocks is difficult, or even impossible-these operations may turn challenging to perform at a reasonable cost [1]. Indeed, according to published data a large fraction of the total production cost of a mixed-signal SoC may be dedicated to test [2].…”

OBT for settling error test of sampled-data systems using signal-dependent clocking

“…This high integration level provides a significant reduction in production cost, but there is a simultaneous increase in the cost of testing and diagnosing these devices [1], [2].…”