Solving Large Top-K Graph Eigenproblems with a Memory and Compute-optimized FPGA Design

Sgherzi, Francesco; Parravicini, Alberto; Siracusa, Marco; Santambrogio, Marco D.

doi:10.1109/fccm51124.2021.00017

Cited by 6 publications

(7 citation statements)

References 36 publications

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“…Custom hardware designs for Top-K sparse eigensolvers have been recently investigated by Sgherzi et al [6], who prototyped their work on high-end FPGAs equipped with High Bandwidth Memory (HBM). They investigates the role of mixed-precision arithmetic for Top-K sparse eigensolvers, but the proposed design does not scale to multiple devices or large out-of-core matrices.…”

Section: Related Workmentioning

confidence: 99%

“…Fig. 2: Speedup (log-scale, higher is better) of our GPU Top-K sparse eigensolver versus the ARPACK multi-core CPU library, and the FPGA implementation in Sgherzi et al [6]. Our GPU implementations runs on a single GPU.…”

Section: A Optimizing Sparse Eigensolvers For Gpusmentioning

confidence: 99%

“…As baselines, we employ the multi-threaded ARPACK library [18], a Top-K sparse eigensolver that uses the IRAM algorithm, running on two Intel Xeon Platinum 8167M (104 threads in total) and 755 GB of DDR4 memory, with singleprecision floating point arithmetic. We also compare against the recent FPGA implementation by Sgherzi et al [6], running on a Xilinx Alveo U280 accelerator card equipped with 8 GB of HBM2 memory. We repeat measurements 20 times, using random initialization for the Lanczos vectors v 1 .…”

Section: A Experimental Setupmentioning

confidence: 99%

“…On average, the GPU eigensolver is 67× faster than the CPU implementation and 1.9× faster than the FPGA hardware design. The FPGA hardware design is still competitive in terms of Performance/Watt, as the FPGA design consumes 38W [6], versus the 300W of the GPU [26].…”

Section: Reconstruction Errormentioning

confidence: 99%

“…Modern data science and numerical mathematics applications operate on larger and larger data, often with strict requirements of minimizing execution time and power consumption. For many of these applications, hardware accelerators such as Graphics Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs) are a highly-effective solution, especially when mixed-precision and reduced-precision arithmetic come into play [1]- [6]. As spectral methods become ubiquitous in the large scale graph pipelines of Spectral Clustering [7], Information Retrieval (IR) [8] and ranking [9], such techniques require algorithms that can compute only a subset of the most relevant eigenvalues (i.e.…”

Section: Introductionmentioning

confidence: 99%

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A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

Sgherzi¹,

Parravicini²,

Santambrogio³

2022

Preprint

Self Cite

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Graph analytics techniques based on spectral methods process extremely large sparse matrices with millions or even billions of non-zero values. Behind these algorithms lies the Top-K sparse eigenproblem, the computation of the largest eigenvalues and their associated eigenvectors. In this work, we leverage GPUs to scale the Top-K sparse eigenproblem to bigger matrices than previously achieved while also providing state-of-the-art execution times. We can transparently partition the computation across multiple GPUs, process out-of-core matrices, and tune precision and execution time using mixed-precision floating-point arithmetic. Overall, we are 67× faster than the highly optimized ARPACK library running on a 104-thread CPU and 1.9× than a recent FPGA hardware design. We also determine how mixedprecision floating-point arithmetic improves execution time by 50 % over double-precision, and is 12× more accurate than single-precision floating-point arithmetic.

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Section: Related Workmentioning

confidence: 99%

Section: A Optimizing Sparse Eigensolvers For Gpusmentioning

confidence: 99%

Section: A Experimental Setupmentioning

confidence: 99%

Section: Reconstruction Errormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

Sgherzi¹,

Parravicini²,

Santambrogio³

2022

Preprint

Self Cite

View full text Add to dashboard Cite

show abstract

A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

Sgherzi

Parravicini

Santambrogio

2022

2022 IEEE International Symposium on Circuits and Systems (ISCAS)

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Exploiting HBM on FPGAs for Data Processing

Shi

Kara²,

Hagleitner

et al. 2022

ACM Trans. Reconfigurable Technol. Syst.

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FPGAs are increasingly being used in data centers and the cloud due to their potential to accelerate certain workloads as well as for their architectural flexibility since they can be used as accelerators, as smart-NICs, or a stand-alone processors. To meet the challenges posed by these new use cases, FPGAs are quickly evolving in terms of their capabilities and organization. The utilization of High Bandwidth Memory (HBM) in FPGA devices is one recent example of such a trend. In this paper, we study the potential of FPGAs equipped with HBM from a data analytics perspective. We consider three workloads common in analytics oriented databases and implement them on an FPGA showing in which cases they benefit from HBM: range selection, hash join, and stochastic gradient descent for linear model training. We integrate our designs into a columnar database (MonetDB) and show the trade-offs arising from the integration related to data movement and partitioning. We consider two possible configurations of the HBM, using a single and a dual clock version design. With the right design, FPGA+HBM based solutions are able to surpass the highest performance provided by either a 2-socket POWER9 1 system or a 14-core Xeon 2 E5 by up to 5.9x (range selection), 18.3x (hash join), and 6.1x (SGD).

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Solving Large Top-K Graph Eigenproblems with a Memory and Compute-optimized FPGA Design

Cited by 6 publications

References 36 publications

A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

A Mixed Precision, Multi-GPU Design for Large-scale Top-K Sparse Eigenproblems

Exploiting HBM on FPGAs for Data Processing

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