2010
DOI: 10.1109/led.2010.2081659
|View full text |Cite
|
Sign up to set email alerts
|

Solution-Processed ZTO TFTs With Recessed Gate and Low Operating Voltage

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
14
0

Year Published

2011
2011
2018
2018

Publication Types

Select...
8

Relationship

3
5

Authors

Journals

citations
Cited by 32 publications
(14 citation statements)
references
References 11 publications
0
14
0
Order By: Relevance
“…Even though the solution-processed ZTO ring oscillators showed a decreased operation frequency in the initial stage, after 10 min, the circuits have shown stable operation for more than 2 h. From these results, it is found that the devices with appropriate passivation layers and geometric design could be operated stably in ambient air. Moreover, a high-k gate dielectric structure may be considered to lower the operation voltage for more stable operation of the ring oscillators [15].…”
Section: Resultsmentioning
confidence: 99%
“…Even though the solution-processed ZTO ring oscillators showed a decreased operation frequency in the initial stage, after 10 min, the circuits have shown stable operation for more than 2 h. From these results, it is found that the devices with appropriate passivation layers and geometric design could be operated stably in ambient air. Moreover, a high-k gate dielectric structure may be considered to lower the operation voltage for more stable operation of the ring oscillators [15].…”
Section: Resultsmentioning
confidence: 99%
“…A high-j dielectric, ZrO 2 , was deposited from solution by a sol-gel route. 34 Source and drain (S/D) electrodes consisting of a Ti/ Au (3 nm/35 nm) double layer were deposited by thermal evaporation followed by the lift-off process. After the deposition of S/D electrodes, the dielectric surface was treated by UV light in air for 10 min to modify its surface characteristics so as to achieve a spatially uniform network of CNTs upon inkjet printing.…”
mentioning
confidence: 99%
“…Two layers of high-j ZrO 2 dielectric (thickness 90-100 nm) were deposited on a heavily doped Si wafer (which was employed as the gate) using a sol-gel route. 29 The dielectric surface was exposed to UV light in air for 10 min, causing the surface to become more hydrophilic, facilitating the deposition of the ZTO layer. The thickness of the ZTO layer (30-40 nm), the inkjet printing of the ZTO solution was repeated 4 times.…”
Section: Inkjet Printed Ambipolar Transistors and Inverters Based On mentioning
confidence: 99%
“…The substrate temperature during printing was maintained at 60 C. 30 Following inkjet printing, the substrate was annealed on a hotplate at 500 C for an hour in air to facilitate the conversion of the ZTO precursor film to amorphous ZTO, as described previously. 28,29 After annealing, the source and drain electrodes consisting of a bilayer of Ti (3 nm) and Au (50 nm) were patterned by photolithography and lift-off. Next, the surface of ZTO film was exposed to UV light in air for 10 min to promote the wetting of the SWCNT ink.…”
Section: Inkjet Printed Ambipolar Transistors and Inverters Based On mentioning
confidence: 99%
See 1 more Smart Citation