“…[347] The difference between the intrinsic gate capacitance and the parallel-plate capacitance is more significant with lower SWCNT density or higher dielectric capacitance. [54,364] Preventing water adsorption and reducing dielectric trap states via the use of hydrophobic dielectrics, such as self-assembled nanodielectrics, [338,365] or encapsulation layers, such as AlO x [21,354] or fluoropolymers, [55,366] have proven to be effective approaches for realizing the reliable and stable operation of SWCNT FETs. [33] The on-state conductances and mobilities of selected solutionprocessed SWCNT FETs [36,43,132,155,165,207,208,213,214,236,257,296,297,338] versus channel length are shown in Figure 6F,G.…”