Solution-processed thickness engineering of tellurene for field-effect transistors and polarized infrared photodetectors

Abstract

Research on elemental 2D materials has been experiencing a renaissance in the past few years. Of particular interest is tellurium (Te), which possesses many exceptional properties for nanoelectronics, photonics, and beyond. Nevertheless, the lack of a scalable approach for the thickness engineering and the local properties modulation remains a major obstacle to unleashing its full device potential. Herein, a solution-processed oxidative etching strategy for post-growth thickness engineering is proposed by leveraging the moderate chemical reactivity of Te. Large-area ultrathin nanosheets with well-preserved morphologies could be readily obtained with appropriate oxidizing agents, such as HNO2, H2O2, and KMnO4. Compared with the conventional physical thinning approaches, this method exhibits critical merits of high efficiency, easy scalability, and the capability of site-specific thickness patterning. The thickness reduction leads to substantially improved gate tunability of field-effect transistors with an enhanced current switching ratio of ∼103, promoting the applications of Te in future logic electronics. The response spectrum of Te phototransistors covers the full range of short-wave infrared wavelength (1–3 μm), and the room-temperature responsivity and detectivity reach 0.96 AW-1 and 2.2 × 109 Jones at the telecom wavelength of 1.55 μm, together with a favorable photocurrent anisotropic ratio of ∼2.9. Our study offers a new approach to tackling the thickness engineering issue for solution-grown Te, which could help realize the full device potential of this emerging p-type 2D material.

High-Performance 1D–2D Te/MoS2 Heterostructure Photodetectors with Tunable Giant Persistent Photoconductivity

“…Two-dimensional (2D) semiconducting materials have been studied extensively as photodetectors because of their intriguing optical properties. − Among them, transition metal dichalcogenides (TMDCs) are one of the most investigated owing to their widely tunable electronic bandgap ranging from ∼few tens meV to ∼2 eV. − Even though various studies have reported the wafer-scale synthesis of TMDCs for CMOS-based applications, − TMDCs are vulnerable to oxidation from ambient conditions, which have impeded their use as a replacement for Si technology. In the past few years, air-stable layered materials, such as n-type bismuth oxychalcogenides (Bi 2 O 2 Se), and monoelemental materials, such as p-type tellurene, have been synthesized by chemical vapor deposition (CVD) and hydrothermal synthesis − and utilized for short wavelength infrared (SWIR) photodetectors and MIR at room temperature. − Since photodetectors integrated with single 2D materials in the conventional transistor configuration exhibit very low photoresponses owing to their very small absorption cross section and only the interface of the gate (G)–source (S) and gate (G)–drain (D) contributing to the photocurrent induced by electron and hole separation at the Schottky barrier, vertically stacked photoreactors have been investigated to overcome this issue by maximizing photoactive area, i.e., highly enhanced absorption cross section. − Among them, a vertically stacked van der Waals heterojunction, i.e., forming a p–n junction using two different kinds of materials, or the same type of polarity with different Fermi level has been reported for a high on/off ratio, − superior interface quality because of the lack of dangling bonds in the 2D materials, − and bandgap engineering due to numerous selections of van der Waals materials of various bandgaps and work function for p- and n-type semiconductors. , These devices usually exhibit a photoresponse toward fast photodetectors with rise or fall times of tens of μs to ms. ,− Even though a very slow photoresponse with a long retention time in vertically stacked heterostructured devices using van der Waals 2D materials has been recently reported, − …”

Thinning Solution‐proceed 2D Te for p‐ and n‐channel Junction Field Effect Transistor with High Mobility and Ideal Subthreshold Slope

“…[18][19][20] But, the non-layered feature makes Te difficult to achieve a thin layer with a thickness less than 10 nm, which can limit the gatecontrol ability and device scaling potential. [21][22][23][24] In this work, we propose a facile thinning strategy for solution-proceed Te flakes, that enables an effective thinning of post-growth Te flakes from bulk (hundreds nm) to few-layer (below ten nm), remaining a high materials quality and guaranteeing the high efficient electrostatic doping as a transistor channel. Then, we fabricate a four-terminal architecture of JFETs by integrating the ultrathin Te with n-type ReS 2 flakes.…”