2018
DOI: 10.1016/j.mee.2018.01.002
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Solid-state dewetting of single-crystal silicon on insulator: effect of annealing temperature and patch size

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Cited by 15 publications
(22 citation statements)
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“…Top panels: dark-field optical microscope (100×magnification, NA=0.75) of monocrystalline Si islands on 25 nm BOX. From the left to the right, panels are illustrated with several islands organization obtained from different initial patch size and shape [31,35]. Bottom panels: same as the top panels for islands transferred in a PDMS slice.…”
Section: Discussionmentioning
confidence: 99%
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“…Top panels: dark-field optical microscope (100×magnification, NA=0.75) of monocrystalline Si islands on 25 nm BOX. From the left to the right, panels are illustrated with several islands organization obtained from different initial patch size and shape [31,35]. Bottom panels: same as the top panels for islands transferred in a PDMS slice.…”
Section: Discussionmentioning
confidence: 99%
“…We now take into account the case of templated dewetting of commercial UT-SOI: [31,35] by changing the etched patch size and shape (e.g. simple squares, squares with a central cross, parallel trenches) we obtain different arrangement of the Si particles sitting on a 25nm thick BOX ( figure 6 top panels).…”
Section: Methods B: Transfer In Pdms Slicesmentioning
confidence: 99%
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“…5 Please note that duplicate reference were detected (i.e., Refs. [28] and [35]) and provide instructions for which should be deleted or amended. We can perform renumbering of references if you provide simple instructions.…”
Section: Specific Questions and Comments To Address For This Papermentioning
confidence: 99%