Software Time Reliability in the Presence of Cache Memories

Abstract

Abstract. The use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. In the presence of caches, the worst-case timing behavior of a system heavily depends on how code and data are laid out in cache. Guaranteeing that test runs capture, and hence MBTA results are representative of, the worst-case conflictive cache layouts, is generally unaffordable for end users. The probabilistic variant of MBTA, MBPTA, exploits randomized caches and relieves the user from the burden of concocting layouts. In exchange, MBPTA requires the user to control the number of runs so that a solid probabilistic argument can be made about having captured the effect of worst-case cache conflicts during analysis. We present a computationally tractable Time-aware Address Conflict (TAC) mechanism that determines whether the impact of conflictive memory layouts is indeed captured in the MBPTA runs and prompts the user for more runs in case it is not.

Measurement-based cache representativeness on multipath programs

“…If such probability needs to be lower than 10 −9 to be regarded as negligible w.r.t. the corresponding safety standard [24], then R > 84875. Hence, PUB address sequences may require a higher minimum number of runs than the original ones.…”

“…As a result, TAC does not impose a minimum number of runs higher than that required by the standard application of MBPTA. Note that, for instance, in the case of M 1 or i addresses A, B and C will end up ing in a cache set a er, potentially, few random replacements [24].…”

“…Time-aware Address Con ict (TAC) [24] works on top of MBPTA to factor in cache layouts building on randomization properties. TAC guarantees that the number of execution time measurements fed to MBPTA is large enough to observe the e ect of all relevant cache placements, whose probability of occurrence may be suciently low not to be observed in the default number of runs of MBPTA [1].…”

“…EVT is unable to predict those events (and combinations thereof) when they are not observed in the execution time measurements passed as input [1]. TAC [24] analyzes the address sequence of the program under analysis, and determines the particular groups of addresses with larger impact on execution time when placed together in a set.…”

On uses of extreme value theory fit for industrial-quality WCET analysis

“…In fact, even when representativeness is assured (which requires collecting a minimum number of runs [7], [9], [24]), the way the observations are collected and submitted to analysis critically affects the quality of the EVT results. This is especially evident for the contribution of individual paths to the pWCET distribution of a multi-path program.…”