Measurement-Based Cache Representativeness on Multipath Programs

Abstract

Autonomous vehicles in embedded real-time systems increase criticalso ware size and complexity whose performance needs are covered with high-performance hardware features like caches, which however hampers obtaining WCET estimates that hold valid for all program execution paths.is requires assessing that all cache layouts have been properly factored in the WCET process. For measurement-based timing analysis, the most common analysis method, we provide a solution to achieve cache representativeness and full path coverage: we create a modi ed program for analysis purposes where cache impact is upper-bounded across any path, and derive the minimum number of runs required to capture in the test campaign cache layouts resulting in high execution times.

Non-functional considerations of time-randomized processor architectures

“…For example, if a task's execution time is measured 1, 000 times on a deterministic platform but each execution maintains the same memory layout, memory cache interference and evictions will not be properly accounted for since the layout may change arbitrarily across software integration steps. In contrast, operating in a randomized environment allows us to test and deploy one different layout each execution, therefore increasing the representativeness of the testing campaign [52,53]. This is of paramount importance since it allows the end user to detach from the need of controlling all the dependent states and relationships between hardware features of a processor.…”

“…In the real-time domain, time-randomized caches were initially proposed to provide probabilistic guarantees [67] that tasks do not suffer pathological cache miss patterns that cause a big impact in performance and are hard to capture during testing [68,52,53]. The first proposals on random caches presented non-parametric random caches [69,70] mainly focused towards attaining better average performance.…”