Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation 2022
DOI: 10.1145/3519939.3523456
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Software-hardware codesign for efficient in-memory regular pattern matching

Abstract: Regular pattern matching is used in numerous application domains, including text processing, bioinformatics, and network security. Patterns are typically expressed with an extended syntax of regular expressions. This syntax includes the computationally challenging construct of bounded repetition or counting, which describes the repetition of a pattern a fixed number of times. We develop a specialized in-memory hardware architecture that integrates counter and bit vector modules into a state-of-the-art in-memor… Show more

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Cited by 7 publications
(3 citation statements)
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References 58 publications
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“…The background information is input into the decoder. After passing through the encoder, all the information becomes the target language sequence [ 12 ]. The specific framework is shown in Figure 1 .…”
Section: Methodsmentioning
confidence: 99%
“…The background information is input into the decoder. After passing through the encoder, all the information becomes the target language sequence [ 12 ]. The specific framework is shown in Figure 1 .…”
Section: Methodsmentioning
confidence: 99%
“…However, their execution requires the simultaneous activation of multiple transitions, leading to severe bandwidth limitations. A set of works addressing this issue targets NFAs execution on hardware accelerators [13], [21], [41], [42], exploiting ad-hoc algorithms [27], [28], [43]. These algorithmic solution take advantage of NFAs multiple active states by parallelizing the automaton traversal [32].…”
Section: Background Knowledgementioning
confidence: 99%
“…To fully exploit FSAs executive potential, there exist various techniques fostering the optimization of both NFAs and DFAs that tackle NFAs partitioning [26], multi-stride DFAs [11], [28], [40], and DFAs compression [33], [46]. These optimization approaches involve both architectural [6], [13], [20]- [23], [26], [41], [47] and algorithmic aspects [11], [12], [14], [33]. An architectural approach to optimizing NFAs [26] relies on a toolchain to partition them, depending on the available hardware resources and units.…”
Section: Related Workmentioning
confidence: 99%