Software/Hardware Co-Design of Modular Exponentiation for Efficient Rsa Cryptosystem

Abstract

This paper presents an implementation of Rivest, Shamir and Adleman (RSA) cryptosystem based on hardware/software (HW/SW) co-design. The main operation of RSA is the modular exponentiation (ME) which is performed by repeated modular multiplications (MMs). In this work, the right-to-left (R2L) algorithm is used for the implementation of the ME as a programmable system on chip (PSoC). The processor MicroBlaze of Xilinx is used for flexibility. The R2L method is often suggested to improve the timing performance, since it is based on parallel computations of MMs. However, if the optimization of HW resources is a constraint, this method can be executed sequentially using a single modular multiplier as a custom intellectual property (IP). Consequently, the execution time of the ME becomes dependent of three factors, namely the capability of the custom IP to perform the MMs, the nonzero bit string of the exponent and the communication link between the processor and the custom IP. In order to achieve the best trade-off between area, speed and flexibility, we propose three implementations in this work. The first one is a pure software solution. The second one takes benefit of a HW accelerator dedicated to the MM execution. The last one is based on a dual strategy. Two parallel MMs are implemented within a custom IP and local memories are used close to the arithmetic units to minimize the communication link influence. The results show that in the application to RSA 1024-bits, the ME runs in 22,25 ms, while using only 1,848 slices.

Microblaze-based parallel implementations of elliptic curve scalar multiplication over <i>F<SUB align="right">p</i> on FPGA

“…Algorithm 2 represents the scalable version of the original MMM algorithm (Montgomery, 1985), where the entire basics arithmetic operations are executed in radix-2 32 . The MMM computation using this algorithm is detailed in Issad et al (2014).…”

“…Hence, we propose to perform MI using modular exponentiation (Mexp) according to Fermat's little theorem as it is shown in expression ( 19) (Hankerson et al, 2004). The easiest way to perform Mexp is the left-to-right binary method (Issad et al, 2014). The first approach [Figure 4(a)] is a single microblaze-based SW/HW implementation (1MbSW/HW).…”

“…Finally, MB 0 controls the conversion of the resulting point R0 (0) from Chudnovsky to affine (C2A_conv) coordinates system according to the expressions (6). The required Mexp for the conversion is executed in parallel mode (Issad et al, 2014) by both processors using Chv_to_Aff instruction.…”

“…In other words, these implementations are note suitable when less area consumption is targeted. Thus, in order to optimise and to adapt the execution of this operation to the data bus of microblaze processor, our method uses the modified high radix-r (r = 2 32 ) MMM algorithm (Bellemou et al, 2015;Issad et al, 2014). In fact, when long modulus are considered, the original MMM algorithm requires not only a long carry propagation paths and multipliers but also, a long registers to store the operands and the intermediate results., Therefore, SelectRAM blocks in the internal architecture of our AccMMM core are exploited to store the data instead of long registers.…”

Efficient Implementation on Low-Cost SoC-FPGAs of TLSv1.2 Protocol with ECC_AES Support for Secure IoT Coordinators

“…This theorem and, consequently, Equation (7), are valid when n is prime integer. The easiest way to perform Mexp is the left-to-right binary method [44].…”