Single-Measurement Diagnostic Test Method for Parametric Faults of I/Q Modulating RF Transceivers

Erdogan, E.S.; Ozev, Sule

doi:10.1109/vts.2008.39

Cited by 15 publications

(11 citation statements)

References 13 publications

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“…The proposed methodology is computational intensive and does not necessitate the estimation of the imperfection specifications. [3] uses loopback method to estimate the parametric variations in I1Q mismatch and time skew. A simple calibration algorithm for I1Q mismatch cancellation and LO leakage suppression through spectrum analysis is presented in [4].…”

Section: Introductionmentioning

confidence: 99%

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DSP assisted low cost IQ mismatch measurement and compensation using built in power detector

Sen

Devarakond

Chatterjee

2010

2010 IEEE MTT-S International Microwave Symposium

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This paper proposes a cosUtime efficient accurate DSP based measurement and compensation methodology for I/Q imperfections in quadrature transceivers through phase-to amplitude conversion using no hardware overhead. The proposed one-shot technique utilizes equation based optimum test stimulus estimation and power detection mechanisms. Circuit simulations presented show that both gain and phase mismatch can be measured with high accuracy. Hardware validation of the methodology provide for impairment estimation accuracy of within 0.5% for gain and 4.5% for phase. Index Terms -DSP based RF Calibration, power detection, IQ mismatch, Loop-back estimation. I. INTRODUCTIONModern wireless systems mandate high levels of circuit integration and stringent power consumption requirements. These demands lead to various imperfections in RF front end circuits. In quadrature architectures I/Q mismatch (both gain and phase characteristics), LO leakage and DC offset corrupt the spectral purity of the received signal thereby resulting in higher BER in communication systems. These impairments are of greater significance in wideband communication systems as shown in [I].Hence, significant amount of work has been done for IQ mismatch measurement and compensation.[2] provides an elegant adaptive methodology of correcting I1Q mismatches in quadrature modulators/demodulators using an envelope detector to down-covert the RF signal. The authors try to minimize the least squares error in obtaining the coefficients of the compensator block. The proposed methodology is computational intensive and does not necessitate the estimation of the imperfection specifications.[3] uses loopback method to estimate the parametric variations in I1Q mismatch and time skew. A simple calibration algorithm for I1Q mismatch cancellation and LO leakage suppression through spectrum analysis is presented in [4]. Though accurate, [3] needs a iterative method and [4] needs to perform spectrum analysis meaning significant time and hardware overhead.In [5], the authors propose efficient method for industrial calibration of I1Q imperfections in quadrature modulators. These imperfections include I1Q gain and phase mismatch along with dc offset errors. The authors exploit the presence of an extra loopback receiver (placed for performing digital pre-distortion of HPA) to correct for these imperfections. The received constellations along with programmable DAC

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Section: Introductionmentioning

confidence: 99%

“…A simple calibration algorithm for I1Q mismatch cancellation and LO leakage suppression through spectrum analysis is presented in [4]. Though accurate, [3] needs a iterative method and [4] needs to perform spectrum analysis meaning significant time and hardware overhead.…”

Section: Introductionmentioning

confidence: 99%

DSP assisted low cost IQ mismatch measurement and compensation using built in power detector

Sen

Devarakond

Chatterjee

2010

2010 IEEE MTT-S International Microwave Symposium

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“…Today's transceiver systems contain many on-chip functional blocks. Therefore, utilization of on-chip resources for test purposes [6]- [8], which is also known as built-inself-test (BiST), has received much attention recently. Some or all of the tester resources required for the particular test can be implemented on-chip [9]- [11].…”

Section: Introductionmentioning

confidence: 99%

“…In our earlier work, we proposed a loop-back diagnostic test solution for QPSK systems [8]. However, in any loop-back configuration, the transmitter and the receiver paths are active at the same time.…”

Section: Introductionmentioning

confidence: 99%

A Packet Based 2x-Site Test Solution for GSM Transceivers with Limited Tester Resources

Erdogan

Ozev

2009

2009 27th IEEE VLSI Test Symposium

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In this paper, we present a 2x-site test solution for GSM transceivers using only baseband signals for analysis. We perform all operations on standard-compliant GSM packets, thereby putting the device under the normal operating conditions. The transmitter on one device under test (DUT) is coupled with a receiver on another DUT to form a complete Tx-Rx path. Parameters of the two devices are decoupled from one another by carefully modeling the system into a known format and using signal processing techniques. Simulation as well as measurement results confirm the high accuracy of the proposed technique.

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“…Conventionally, the output of the Tx is then routed back to the input of the receiver (Rx; see the dashed arrow), where it is amplified, down converted to the baseband frequency, converted back to the digital domain, and analyzed for functionality verification of the complete transceiver. In this decade, algorithms have been demonstrated with system-level validations to improve test coverage and fault identification based on bit-error-rate (BER) results [5], spectral analysis of the Rx output [6], and in-phase/quadrature-phase mismatch parameter estimation [7]. Recent works have also addressed test time reduction by using optimized bitstreams for the loopback test [8], statistical sampling circuits along the RF path [9], and demonstration of a method for wafer-level production test [10].…”

Section: Introductionmentioning

confidence: 99%

An On-Chip Loopback Block for RF Transceiver Built-In Test

Onabajo

Silva-Martínez

Fernández

et al. 2009

IEEE Trans. Circuits Syst. II

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This brief addresses the realization of an on-chip block for built-in testing of RF transceivers with the loopback method. Design issues and measurement results are discussed, giving practical insights into closing the signal path between transmitter (Tx) and receiver (Rx) sections. The circuit is intended for cost-efficient production testing of RF front-end blocks with on-chip power detectors and bit-error-rate analysis at baseband frequencies for integrated transceivers operating in the 1.9-to 2.4-GHz range. It can provide 40-200 MHz Tx-Rx frequency shifting and 26-42 dB continuous attenuation while consuming a 0.052-mm 2 die area in 0.13-µm CMOS technology and ∼12 mW of power when activated in test mode.Index Terms-Built-in test (BIT), loopback, RF front-end testing, transceiver.

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Single-Measurement Diagnostic Test Method for Parametric Faults of I/Q Modulating RF Transceivers

Cited by 15 publications

References 13 publications

DSP assisted low cost IQ mismatch measurement and compensation using built in power detector

DSP assisted low cost IQ mismatch measurement and compensation using built in power detector

A Packet Based 2x-Site Test Solution for GSM Transceivers with Limited Tester Resources

An On-Chip Loopback Block for RF Transceiver Built-In Test

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