Single event upset in avionics

Taber, A. H.; Normand, E.

doi:10.1109/23.212327

Cited by 188 publications

(62 citation statements)

References 12 publications

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“…One exception is measurement at high altitudes or on-board airplanes since the neutron flux increases by nearly three orders of magnitude at flight altitudes (Section 2). In-flight measurements have been instrumental in validating the accuracy of accelerated measurements using human-made, high-intensity particle sources [8], [9], [48] and for measurements of the atmospheric neutron flux [14], [49]. Since a typical device SER is very low under normal conditions [50], it is more practical to measure the SER under accelerated conditions and then scale the measurements back to natural conditions.…”

Section: Measurement Of Sermentioning

confidence: 99%

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Characterization of soft errors caused by single event upsets in CMOS processes

Karnik

Hazucha

2004

IEEE Trans.Dependable and Secure Comput.

442

211

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Abstract-Radiation-induced single event upsets (SEUs) pose a major challenge for the design of memories and logic circuits in highperformance microprocessors in technologies beyond 90nm. Historically, we have considered power-performance-area trade offs. There is a need to include the soft error rate (SER) as another design parameter. In this paper, we present radiation particle interactions with silicon, charge collection effects, soft errors, and their effect on VLSI circuits. We also discuss the impact of SEUs on system reliability. We describe an accelerated measurement of SERs using a high-intensity neutron beam, the characterization of SERs in sequential logic cells, and technology scaling trends. Finally, some directions for future research are given.

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Section: Measurement Of Sermentioning

confidence: 99%

“…A 256 kbit SRAM showed failures at a rate of one error per chip in 80 days. In the same year, Alan Taber from IBM and Eugene Normand from Boeing demonstrated a strong correlation of the in-flight error rates with 1-10 MeV atmospheric neutron flux [9].…”

Section: Introductionmentioning

confidence: 98%

Characterization of soft errors caused by single event upsets in CMOS processes

Karnik

Hazucha

2004

IEEE Trans.Dependable and Secure Comput.

442

211

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“…However, interesting results have arisen from life tests performed in ground or underground laboratories [1]- [8], in avionics [9]- [11], or in operative space satellites [12], [13].…”

Section: Introductionmentioning

confidence: 99%

Defining a strategy to perform life-tests with analog devices

Franco

Palomar

Liu

et al. 2011

2011 12th European Conference on Radiation and Its Effects on Components and Systems

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Abstract-Unlike for memory elements inside integrated circuits, scarce life tests have been performed to study single event transients in discrete analog devices. The reason is that life tests require a large amount of samples to be stored for having enough data allowing statistical conclusions and, usually, single event transients are captured by means of oscilloscopes. In this paper, we propose a strategy to carry out life tests in analog voltage comparators by means of digital programmable device that can detect anomalous pulses in the voltage comparator. Besides, the idea on which this kind of tests relies can be extended to be used with other families of analog devices, such as operational amplifiers, voltage references, etc.

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“…The soft memory errors rate is predicted to increase in the future [4]. Since the amount of cosmic rays increases with altitude, soft memory errors are a serious concern in fields like avionics and space research [5].…”

Section: Introductionmentioning

confidence: 99%

Counting in the Presence of Memory Faults

Brodal

Jørgensen

Moruz

et al. 2009

Algorithms and Computation

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Abstract. The faulty memory RAM presented by Finocchi and Italiano [1] is a variant of the RAM model where the content of any memory cell can get corrupted at any time, and corrupted cells cannot be distinguished from uncorrupted cells. An upper bound, δ, on the number of corruptions and O(1) reliable memory cells are provided. In this paper we investigate the fundamental problem of counting in faulty memory. Keeping many reliable counters in the faulty memory is easily done by replicating the value of each counter Θ(δ) times and paying Θ(δ) time every time a counter is queried or incremented. In this paper we decrease the expensive increment cost to o(δ) and present upper and lower bound tradeoffs decreasing the increment time at the cost of the accuracy of the counters.

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Single event upset in avionics

Cited by 188 publications

References 12 publications

Characterization of soft errors caused by single event upsets in CMOS processes

Characterization of soft errors caused by single event upsets in CMOS processes

Defining a strategy to perform life-tests with analog devices

Counting in the Presence of Memory Faults

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