Single-event burnout of Super-junction power MOSFETs

Abstract

The experimental results of single-event burnout (SEB) of super-junction power MOSFETs are reported for the first time in comparison with those of standard MOSFETs. Similar tendencies were observed from both results. While a super-junction MOSFET (SJ-MOSFET) has an attractive electrical performance such as low on-resistance and high breakdown voltage, the experiment demonstrated that there was no structural advantage in SEB tolerance.Index Terms-Angular irradiation, energetic particle induced charge spectroscopy (EPICS) spectra, power MOSFET, single-event burnout (SEB), super-junction power MOSFET.

Temperature dependence of single-event burnout for super junction MOSFET

“…As according to ref. [1] an SJ device could also suffer a catastrophic failure from Single-Event-Burnout (SEB) caused by cosmic ray, in designing the device it is necessary to consider the effect of cosmic ray, in order to assure reliability for application in question such as in the industrial or automotive field [2]. As the device may be used in a wide temperature range in these applications, it is necessary to study the dependence on temperature.…”

Analysis study of sensitive volume and triggering criteria of single‐event burnout in super‐junction metal‐oxide semiconductor field‐effect transistors

“…The sensitivity evolution depends on the applied bias voltage: Under a low bias voltage (<400 V), SJ‐MOSFET is more sensitive than the VDMOS; At 400 V, the sensitivity is similar for both devices; Under a high bias voltage (>400 V), the VDMOS is more sensitive than the SJ‐MOSFET. This may be the reason why Huang , et al [5] found that the SJ‐MOSFET is less vulnerable to the SEB than the VDMOS. Nevertheless, Ikeda , et al [15] demonstrated that there was no structural advantage in SEB tolerance for the SJ‐MOSFET and there was not much difference in SEB tolerance between the two technologies.…”

“…Huang , et al [5] showed that the presence of a horizontal electric field and a smaller vertical electric field in the SJ device significantly reduced its vulnerability to SEB and SEGR compared to VDMOS. Ikeda , et al [15] showed experimentally that there was not much difference in SEB tolerance between the two. However, a better SEB tolerance is obtained by decreasing the die size while maintaining a low on‐resistance for SJ‐MOSFET and by applying the hardening technique for the VDMOS structure.…”

A Brief Review of Single-Event Burnout Failure Mechanisms and Design Tolerances of Silicon Carbide Power MOSFETs

“…Due to the unique electric field profile and space charge balance in the device, Huang et al [99] hypothesized that a Si SJ MOSFET would have a greater SEB tolerance than a VDMOSFET and confirmed this with 2D heavy ion strike simulation. Ikeda et al [100] later showed experimentally that an SJ offered no improvement to SEB tolerance over a VDMOSFET. Further simulation and experimental studies on Si SJ MOSFETs showed there was no inherent advantage in SEE tolerance [101][102][103][104][105].…”