2001
DOI: 10.1063/1.1421081
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Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method

Abstract: We propose and implement a promising fabrication technology for geometrically well-defined single-electron transistors based on a silicon-on-insulator quantum wire and side-wall depletion gates. The 30-nm-wide silicon quantum wire is defined by a combination of conventional photolithography and process technology, called a side-wall patterning method, and depletion gates for two tunnel junctions are formed by the doped polycrystalline silicon sidewall. The good uniformity of the wire suppresses unexpected pote… Show more

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Cited by 27 publications
(13 citation statements)
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“…Single electron transistor (SET) [1][2][3] is one of those elements, and its application to single photon counters has been tried [4,5]. The performance of SET is restricted in the region that the charging energy of a quantum dot e 2 / 2C dominates over the thermal energy k B T, where C is the total capacitance of tunneling junctions.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Single electron transistor (SET) [1][2][3] is one of those elements, and its application to single photon counters has been tried [4,5]. The performance of SET is restricted in the region that the charging energy of a quantum dot e 2 / 2C dominates over the thermal energy k B T, where C is the total capacitance of tunneling junctions.…”
Section: Introductionmentioning
confidence: 99%
“…To operate the SET at room temperature, the area of tunneling junctions which compose the SET should be on a few-nanometer scale [3]. However, since in top-down approaches such as electronbeam lithography it is difficult to manipulate the structure of a few-nanometer scale, SETs or SET-based single photon counters fabricated by such methods can work only at very low temperature [1,2,4,5], and moreover, integration or bulk production is difficult because of their laborious fabrication process.…”
Section: Introductionmentioning
confidence: 99%
“…The potential barrier of the island can be controlled by one or more gates. Based on the Coulomb blockade effect, several circuit applications in logic and memory have been proposed and simulated [10][11][12][13]. Single-electron flash memory is one of the first single-electron devices demonstrated to operate at room temperature, in which one electron stored in the floating gate represents one bit of information.…”
Section: Introductionmentioning
confidence: 99%
“…Both methods lead to nanochannels that have their smallest dimension perpendicular to the substrate (i.e., running parallel to the substrate surface); however, by combining them with deep-UV photolithography, laser interference lithography, or nanoimprint lithography (NIL) [69,70], it also becomes possible to control the lateral dimension (i.e., the dimension parallel to the substrate surface) down to several tens of nanometers. Alternative methods of achieving nano dimensions in the lateral direction without sophisticated lithography make use of shadowing effects at step edges [71,72], the special structures that arise after stiction of a surface-machined cantilever [72], or of nonuniform film step coverage in deep trenches, followed by an annealing step that leads to reflow of the film material and shrinkage of the channel [73]. In these methods, the limitations on dimensional control derive from either the lithographic definition, the control over the thin film thickness (and its uniformity), the control over the etching depth (and its uniformity), or the surface roughness (which is usually below 0.5 nm on average when polished silicon or glass substrates are used).…”
Section: Nanochannel Fabricationmentioning
confidence: 99%