Simultaneous switching ground noise calculation for packaged CMOS devices

Senthinathan, R.; Prince, J.L.

doi:10.1109/4.98995

Cited by 173 publications

(39 citation statements)

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“…In the past a number of approaches have been proposed to analyze the power/ground bounce and its effect on the performance of VLSI circuits. In [1], Senthinathan et al described an accurate technique for estimating the peak ground bounce noise by observing a negative local feedback that is actually present in the current path of the driver. The work, however, suffers from an unrealistic assumption about the time-domain variations of the switching current waveform.…”

Section: Introductionmentioning

confidence: 99%

“…The work, however, suffers from an unrealistic assumption about the time-domain variations of the switching current waveform. More specifically, paper [1] assumes that the switching currents of output drivers have a triangular wave-shapes. In [2], Vaidyanath et al relax this assumption by deriving an expression for peak value of ground bounce value under the more realistic and milder assumption that the ground bounce is a linear function of time during the output transition of the driver.…”

Section: Introductionmentioning

confidence: 99%

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Ground bounce in digital VLSI circuits

Heydari

Pedram

2003

IEEE Trans. VLSI Syst.

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Abstract-This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the propagation delay and the optimum tapering factor of a multistage buffer is discussed and a mathematical relationship for total propagation delay in the presence of the ground bounce is obtained. Effect of an on-chip decoupling capacitor on the ground bounce waveform and circuit speed is analyzed next and a closed form expression for the peak value of the differential-mode component of the ground bounce in terms of the on-chip decoupling capacitor is provided. Finally a design methodology for controlling the switching times of the output drivers to minimize the ground bounce is presented.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Ground bounce in digital VLSI circuits

Heydari

Pedram

2003

IEEE Trans. VLSI Syst.

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“…For example, Senthinathan and Prince [2] proposed accurate equations for the peak voltage of ground bounce estimation in ICs and demonstrated the influence of simultaneous switching noise (SSN). The effects of conducted and radiated emission for electronic devices were also widely discussed in [3]～ [6].…”

Section: ⅰ Introductionmentioning

confidence: 99%

Modeling and Prediction of Electromagnetic Immunity for Integrated Circuits

Pu¹,

Kim²,

Kim³

et al. 2013

Journal of electromagnetic engineering and science

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An equivalent model has been developed to estimate the electromagnetic immunity for integrated circuits under a complex electromagnetic environment. The complete model is based on the characteristics of the equipment and physical configuration of the device under test (DUT) and describes the measurement setup as well as the target integrated circuits under test, the corresponding package, and a specially designed printed circuit board. The advantage of the proposed model is that it can be applied to a SPICE-like simulator and the immunity of the integrated circuits can be easily achieved without costly and time-consuming measurements. After simulation, measurements were performed to verify the accuracy of the equivalent model for immunity prediction. The improvement of measurement accuracy due to the added effect of a bi-directional coupler in the test setup is also addressed.Key words: Electromagnetic Immunity, Integrated Circuits, Modeling, Direct Power Injection.Manuscript received November 30, 2012 ; Revised February 6, 2013 ; Accepted February 22, 2013. (ID No. 20121130-01J) 1 Dept. of Electrical and Electronics Engineering, Sungkyunkwan University, Suwon, Korea. 2 Dept. of Semiconductor System Engineering, Sungkyunkwan University, Suwon, Korea.Corresponding Author : Wansoo Nah (e-mail : wsnah@skku.edu) This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/ by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited. Ⅰ. IntroductionRecent annual reports of the International Technology Roadmap for Semiconductor (ITRS) [1] indicate a trend whereby digital and analog integrated circuits (ICs) are becoming increasingly more vulnerable because the integration of the device, the number of interfaces, and the operation frequency is becoming more complicated while the node capacitance and noise margin are decreasing.This trend, coupled with a complex electromagnetic environment, infers that the noise from direct injection, coupling, and radiated emission could easily affect a semiconductor system, and even damage it.Noise analysis has attracted substantial attention. For example, Senthinathan and Prince [2] proposed accurate equations for the peak voltage of ground bounce estimation in ICs and demonstrated the influence of simultaneous switching noise (SSN). The effects of conducted and radiated emission for electronic devices were also widely discussed in [3]～ [6]. Integrated circuits, in particular, are often considered as the main victim of electromagnetic interference (EMI) [7]. In other words, sufficient levels of radio-frequency (RF) noise can cause errors or malfunctions in digital and analog ICs.The prediction of electromagnetic immunity is a pivotal issue for high speed and high frequency integrated circuits. The immunity of ICs is crucial for the performance of the related electronic devices, and even for th...

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“…Assuming a current change dI happens in a time interval of dt, it will generate a voltage of V N ¼ L eff dI/dt on the parasitic inductance with an equivalent value of L eff . Delta-I noise can reduce the driver bias voltage; 71 in this case, the effect is called the ground bounce. Disturbances of several millivolts to $1 V have been reported.…”

Section: A Decoupling Capacitorsmentioning

confidence: 99%

“…There are several kinds of noise, one of which is the Delta-I noise. 71 This noise consists of an unwanted voltage on the parasitic inductance power plane connections, caused by the transient currents associated with switching. Assuming a current change dI happens in a time interval of dt, it will generate a voltage of V N ¼ L eff dI/dt on the parasitic inductance with an equivalent value of L eff .…”

Section: A Decoupling Capacitorsmentioning

confidence: 99%

Challenges and opportunities for multi-functional oxide thin films for voltage tunable radio frequency/microwave components

Subramanyam¹,

Cole²,

Sun³

et al. 2013

Journal of Applied Physics

145

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There has been significant progress on the fundamental science and technological applications of complex oxides and multiferroics. Among complex oxide thin films, barium strontium titanate (BST) has become the material of choice for room-temperature-based voltage-tunable dielectric thin films, due to its large dielectric tunability and low microwave loss at room temperature. BST thin film varactor technology based reconfigurable radio frequency (RF)/microwave components have been demonstrated with the potential to lower the size, weight, and power needs of a future generation of communication and radar systems. Low-power multiferroic devices have also been recently demonstrated. Strong magneto-electric coupling has also been demonstrated in different multiferroic heterostructures, which show giant voltage control of the ferromagnetic resonance frequency of more than two octaves. This manuscript reviews recent advances in the processing, and application development for the complex oxides and multiferroics, with the focus on voltage tunable RF/microwave components. The over-arching goal of this review is to provide a synopsis of the current state-of the-art of complex oxide and multiferroic thin film materials and devices, identify technical issues and technical challenges that need to be overcome for successful insertion of the technology for both military and commercial applications, and provide mitigation strategies to address these technical challenges. V C 2013 AIP Publishing LLC.

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Simultaneous switching ground noise calculation for packaged CMOS devices

Cited by 173 publications

References 6 publications

Ground bounce in digital VLSI circuits

Ground bounce in digital VLSI circuits

Modeling and Prediction of Electromagnetic Immunity for Integrated Circuits

Challenges and opportunities for multi-functional oxide thin films for voltage tunable radio frequency/microwave components

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