Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies

Abstract

This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide a performance tradeoff. MOJITO defines a space of possible topologies as a hierarchically organized combination of trusted analog building blocks. To minimize the setup burden: no topology selection rules or abstract behaviors need to be specified, and performance calculations are SPICE-based. The search algorithm is a novel multi-objective evolutionary algorithm that uses an age-layered population structure to balance exploration vs. exploitation. Results are shown for a space having 3528 one-and two-stage operational amplifier topologies.

A global postsynthesis optimization method for combinational circuits

“…Koza has reported tens of human-competitive results in various areas of science and technology obtained automatically using evolutionary design techniques, in particular using genetic programming [4]. This approach has mainly been adopted for analog circuit design [5], [6]. In case of digital logic synthesis, the evolutionary synthesis has led to innovative designs only for small circuits (with up to 8-12 inputs) mainly because of very time consuming and so non scalable fitness evaluation [7], [8].…”

Massively multi-topology sizing of analog integrated circuits

“…DARWIN [14] and MINLP [15] define a flat combinatorial space of possible topologies which need just structural information, but the flat approach generalizes poorly and has only been shown on <100 topologies. In contrast, MOJITO [16] uses a hierarchically-defined set of structural blocks to define a space of thousands of topologies; but it has not yet outperformed manual designs. [14] 24 YES NO MINLP [15] 64 YES NO MOJITO [16] 3528 YES NO MOJITO+TAPAS (this work)…”

“…In contrast, MOJITO [16] uses a hierarchically-defined set of structural blocks to define a space of thousands of topologies; but it has not yet outperformed manual designs. [14] 24 YES NO MINLP [15] 64 YES NO MOJITO [16] 3528 YES NO MOJITO+TAPAS (this work)…”

An algorithm for exploiting modeling error statistics to enable robust analog optimization

“…In one, the circuit topology is assumed to be fixed and only optimal device sizing is performed [8], [10]. In the other, the topology is also selected automatically [11]. Our work focuses on the first class of approaches.…”

“…The existing work has fallen into two major categories based on how they evaluate a solution point to drive optimization: approaches relying on extensive use of SPICE simulations [11], [12], [9], and those that construct an analytical model of circuit behavior and use the model to drive the optimization [5], [10], [13], [6]. Clearly, evaluating a solution point via a SPICE simulation gives the most accurate measure of the feasibility and optimality of a solution.…”