1993
DOI: 10.1016/0022-3093(93)91107-e
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Simulations on back gate effects of a-Si TFT off-current under illumination

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“…According to previous literature, the hump in TFTs has been reported in various cases. Uchida et al and Shur et al have underlined that gate bias stress causes this hump behavior in amorphous silicon TFTs. They observed that it is concerned with the localized states in back channel interface, comparing the results of experimental measurements and a 2-D device simulator.…”
Section: Resultsmentioning
confidence: 99%
“…According to previous literature, the hump in TFTs has been reported in various cases. Uchida et al and Shur et al have underlined that gate bias stress causes this hump behavior in amorphous silicon TFTs. They observed that it is concerned with the localized states in back channel interface, comparing the results of experimental measurements and a 2-D device simulator.…”
Section: Resultsmentioning
confidence: 99%