Simulation study on field-plated buried gate-buried channel SiC MESFETs

Abstract

4H-SiCmetal-semiconductor field effect transistors (MESFETs) with Field -Plated (FP) andburied gate-buried channel slmctures are proposed and simulated. The buried gate-buried channel structure serves to reduce thesurface trapping effects, and theField-Plated structure acts asto increase thebreakdown voltage andreduce thepeakelectric field attheedgeofthegateanddrain side. Thesmall signal ACperformance of this kind ofMESFETs isalsoenhanced withtheincrement ofthelength oftheFP.

High-voltage lateral double-implanted MOSFETs implemented on high-purity semi-insulating 4H-SiC substrates with gate field plates

“…20) In this work, we investigated gate field plate structures on lateral 4H-SiC MOSFETs on on-axis HPSI substrate to improve reverse blocking capability. 21,22) In addition, we evaluated the high-temperature operation under both forward and reverse bias conditions with increasing temperature up to 250°C.…”