Simulation and measurement of quasi-optical multipliers

A Compact Hemispherical Beam-Coverage Phased Array Antenna Unit for 5G mm-Wave Applications

“…Where the subscript EP stands for element pattern, b is the amplitude constant of each image field generated from both sides parallel to the slot aperture, β is the wave number at 28 GHz, and d is the distance between the slot aperture and the sides [29]. Contrary to the ideal slot antenna, the designed slot antenna with finite sheet dimensions has a bidirectional pattern in the yz-plane (E-plane) and a quasinondirectional pattern in the xz-plane (H-plane) [31]. The 3-D configuration of the designed slot antenna with finite sheet dimensions is presented in Fig.…”

From simulations to measurements: prototyping an antenna for non‐linear applications at sub‐THz frequencies

“…The main advantages of a QO multiplier array are the lateral compactness of the device, built‐in frequency and polarisation control, simpler impedance matching, reduced ohmic losses and, as each element contributes a small part of the total power, there is reduced risk of thermal breakdown. Previous studies on QO diode‐based multipliers are based on simplistic multiplier elements like wire grids [12], waveguide slots [13], bow‐tie antennas [14] or patch antennas [15]. Most of these studies used the harmonic balance technique to design QO multipliers, and only a limited amount of work includes full‐wave simulations of the QO multiplier with a detailed diode structure [13].…”

“…Previous studies on QO diode‐based multipliers are based on simplistic multiplier elements like wire grids [12], waveguide slots [13], bow‐tie antennas [14] or patch antennas [15]. Most of these studies used the harmonic balance technique to design QO multipliers, and only a limited amount of work includes full‐wave simulations of the QO multiplier with a detailed diode structure [13]. This work suggests an alternative design of the diode‐coupled antenna element based on a ring‐with‐stubs structure, which is optimised to match the diode impedance at both fundamental and third harmonic.…”

“…This work uses the built‐in finite difference time domain (FDTD) method of computer simulation technology (CST) with incorporation of lumped elements for analysis of the multenna. This method has been rarely adopted previously, and only for multipliers below 20 GHz [13].…”