Simulation and fabrication of heterojunction silicon solar cells from numerical computer and hot‐wire CVD

Lien, Shui−Yang; Wuu, Dong−Sing

doi:10.1002/pip.900

Cited by 26 publications

(5 citation statements)

References 25 publications

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“…1. Material parameters used for modelling this c-Si/a-Si heterojunction are the result of an optimisation made by Lien and Wuu [23]. We have used the experimentally measured front reflectance of ITO (grey crosses on Fig.…”

Section: Resultsmentioning

confidence: 99%

Thin crystalline silicon solar cells based on epitaxial films grown at 165°C by RF-PECVD

Cariou

Labrune

Cabarrocas

2011

Solar Energy Materials and Solar Cells

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We report on heterojunction solar cells whose thin intrinsic crystalline absorber layer has been obtained by plasma enhanced chemical vapor deposition at 165°C on highly doped p-type (100) crystalline silicon substrates. We have studied the effect of the epitaxial intrinsic layer thickness in the range from 1 to 2.4 µm. This absorber is responsible for photo-generated current whereas highly doped wafer behave like electric contact, as confirmed by external quantum efficiency measurements and simulations. A best conversion efficiency of 7% is obtained for a 2.4 µm thick cell with an area of 4 cm 2 , without any light trapping features. Moreover, the achievement of a fill factor as high as 78.6% is a proof that excellent quality of the epitaxial layers can be produced at such low temperatures.

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Section: Resultsmentioning

confidence: 99%

Thin crystalline silicon solar cells based on epitaxial films grown at 165°C by RF-PECVD

Cariou

Labrune

Cabarrocas

2011

Solar Energy Materials and Solar Cells

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“…The results have already been discussed in detail and we summarize our findings in this section. The intrinsic layer at the P-a-Si:H /N-c-Si interface influences solar cell performance in three ways: ͑i͒ it passivates the defects on the surface of the c-Si wafer [2][3][4]11,34 which is the reason for its application in the first place; ͑ii͒ it reduces the unwanted electron multi-step tunneling to the front contact in the bias voltage range 0.1 V Ͻ V Ͻ 0.4 V, as well as the beneficial hole tunneling under light, if any, to the front contact; and ͑iii͒ reduces the FF of the device if it is thick ͑Table II͒ or very defective. Passivation of defects on the front wafer surface improves all aspects of solar cell performance, as will be discussed in Sec.…”

Section: A Sensitivity Of the Solar Cell Output To The Intrinsic A-smentioning

confidence: 99%

Carrier transport and sensitivity issues in heterojunction with intrinsic thin layer solar cells on N-type crystalline silicon: A computer simulation study

Rahmouni¹,

Datta

Chatterjee

et al. 2010

Journal of Applied Physics

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Heterojunction with intrinsic thin layer or "HIT" solar cells are considered favorable for large-scale manufacturing of solar modules, as they combine the high efficiency of crystalline silicon ͑c-Si͒ solar cells, with the low cost of amorphous silicon technology. In this article, based on experimental data published by Sanyo, we simulate the performance of a series of HIT cells on N-type crystalline silicon substrates with hydrogenated amorphous silicon ͑a-Si:H͒ emitter layers, to gain insight into carrier transport and the general functioning of these devices. Both single and double HIT structures are modeled, beginning with the initial Sanyo cells having low open circuit voltages but high fill factors, right up to double HIT cells exhibiting record values for both parameters. The one-dimensional numerical modeling program "Amorphous Semiconductor Device Modeling Program" has been used for this purpose. We show that the simulations can correctly reproduce the electrical characteristics and temperature dependence for a set of devices with varying I-layer thickness. Under standard AM1.5 illumination, we show that the transport is dominated by the diffusion mechanism, similar to conventional P/N homojunction solar cells, and tunneling is not required to describe the performance of state-of-the art devices. Also modeling has been used to study the sensitivity of N-c-Si HIT solar cell performance to various parameters. We find that the solar cell output is particularly sensitive to the defect states on the surface of the c-Si wafer facing the emitter, to the indium tin oxide/P-a-Si:H front contact barrier height and to the band gap and activation energy of the P-a-Si:H emitter, while the I-a-Si:H layer is necessary to achieve both high V oc and fill factor, as it passivates the defects on the surface of the c-Si wafer. Finally, we describe in detail for most parameters how they affect current transport and cell properties.

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“…10,11) The stateof-the-art amorphous silicon related passivation layer has been intensively investigated by several research groups, [12][13][14][15] and the modeling of the recombination at the a-Si:H=c-Si interface was also reported. 16) Device simulations of heterojunction crystalline silicon solar cells were also investigated; [17][18][19][20] however, the information on the passivation layer=c-Si interface is still limited. Therefore, further investigation of the recombination mechanism at the interface is required.…”

Section: Introductionmentioning

confidence: 99%

Temperature-dependent minority carrier lifetime of crystalline silicon wafers passivated by high quality amorphous silicon oxide

Inaba¹,

Todoroki²,

Nakada³

et al. 2016

Jpn. J. Appl. Phys.

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We investigated the effects of annealing on the temperature-dependent minority carrier lifetime of a crystalline silicon wafer passivated by hydrogenated amorphous silicon oxide. The annealing significantly affects the lifetime and its temperature dependence. Our device simulations clearly indicate that valence band offset significantly affects the temperature dependence. We also found a slight increase in the interface defect density after annealing.

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Simulation and fabrication of heterojunction silicon solar cells from numerical computer and hot‐wire CVD

Cited by 26 publications

References 25 publications

Thin crystalline silicon solar cells based on epitaxial films grown at 165°C by RF-PECVD

Thin crystalline silicon solar cells based on epitaxial films grown at 165°C by RF-PECVD

Carrier transport and sensitivity issues in heterojunction with intrinsic thin layer solar cells on N-type crystalline silicon: A computer simulation study

Temperature-dependent minority carrier lifetime of crystalline silicon wafers passivated by high quality amorphous silicon oxide

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