SIMD made explicit

Waeijen, Luc; She, Dongrui; Corporaal, Henk; He, Yifan

doi:10.1109/samos.2013.6621142

Cited by 6 publications

(3 citation statements)

References 13 publications

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“…The VEGAS architecture [19] discards the register file entirely and loads vector operands from scratchpad RAM, but in the context of a softcore field-programmable gate array (FPGA) implementation. The AnySP [20] architecture as well as Waeijen et al [21] introduce a forwarding network with explicit bypassing in order to save power in vector register file. This approach takes advantage of the fact that many register values are only consumed once after being written to the register file.…”

Section: Related Workmentioning

confidence: 99%

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

Kultala

Viitanen²,

Berg

et al. 2019

IEEE Trans. VLSI Syst.

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This paper proposes a single instruction multiple data (SIMD) processor, which is programmed with high-level OpenCL language. The low-power processor is customized for executing multiple-input-multiple-output (MIMO) detection algorithms at a high performance while consuming very little power making it suitable for software-defined radio (SDR) applications. The novel combination of SIMD operations on a transport programmed multicore datapath allows saving power on both the execution front end and the back end, leading to very good energy efficiency with a compiler programmable design. We demonstrate the feasibility of the architecture with the layered orthogonal lattice detector and minimum mean-squareerror MIMO algorithms, which can be used as a software-defined radio implementation of the 3GPP local thermal equilibrium r11 standard. Compared to other state-of-the-art SDR architectures, the proposed design adds features that improve programmer productivity with an insignificant power and area impact.

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Section: Related Workmentioning

confidence: 99%

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

Kultala

Viitanen²,

Berg

et al. 2019

IEEE Trans. VLSI Syst.

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“…The wide SIMD processor architecture used in this work is based on the one in [17]. To improve the mapping support for OpenCL programs, some modifications are made.…”

Section: Wide Simd Architecturementioning

confidence: 99%

“…In wide SIMD processors, the register files (RFs) are among the most energy consuming components [17,19]. In this work, we propose to use a wide SIMD architecture with explicit datapath to reduce the RF energy consumption.…”

Section: Introductionmentioning

confidence: 99%

A Co-Design Framework with OpenCL Support for Low-Energy Wide SIMD Processor

She

Waeijen

et al. 2014

J Sign Process Syst

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Energy efficiency is one of the most important metrics in embedded processor design. The use of wide SIMD architecture is a promising approach to build energyefficient high performance embedded processors. In this paper, we propose a design framework for a configurable wide SIMD architecture that utilizes an explicit datapath to achieve high energy efficiency. The framework is able to generate processor instances based on architecture specification files. It includes a compiler to efficiently program the proposed architecture with standard programming languages including OpenCL. This compiler can analyze the static memory access patterns in OpenCL kernels, generate efficient mappings, and schedule the code to fully utilize the explicit datapath. Extensive experimental results show that the proposed architecture is efficient and scalable in terms of area, performance, and energy. In a 128-PE SIMD processor, the proposed architecture is able to achieve up to 200 times speed-up and reduce the total energy consumption by 50 % compared to a basic RISC processor.

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