Significant reduction of leakage current in the TiO2/Si structure by the insertion of the CeO2 intermediate layer

Abstract

The insertion of the CeO2 intermediate layer between the TiO2 layer and the Si substrate reduced the leakage current significantly after rapid thermal annealing (RTA) in O2 ambient for 3 min. After RTA, the TiO2/CeO2/Si structure showed a significantly lower leakage current than the TiO2/Si structure. At a proper voltage of −2 V, which was defined as the difference between the applied gate bias and the flatband voltage, the leakage current density of the TiO2/CeO2/Si structure was ∼10−8 A/cm2, while the leakage current density of the TiO2/Si sample was ∼10−2 A/cm2. The formation of the intermixed structure of TiO2 and CeO2 at the TiO2/CeO2 interface by RTA was thought to contribute to the reduction of the leakage current.

Impact of Growth Conditions on the Phase Selectivity and Epitaxial Quality of TiO2 Films Grown by the Plasma-Assisted Atomic Layer Deposition

“…TiO 2 is a well-studied material due in part to its high structural stability and tunable electronic properties . The most common crystalline phases, anatase and rutile, present a promising low-cost material for a wide range of applications including catalysis, semiconductor coatings, , photovoltaics, , and gate dielectrics . Although there are a wide variety of techniques for depositing TiO 2 , atomic layer deposition (ALD) has been shown to be a particularly useful method to achieve low-temperature, thin conformal films, which has been deposited on a large variety of materials and architectures.…”

Atomic Layer Deposition of Thin Films Using O2 as Oxygen Source

“…TiO 2 has been widely used as a catalyst, [1][2][3] but it can also be applied as a dielectric in metal oxide semiconductor devices. 4,5 Commonly, the TiO 2 films used in electronics are grown by chemical vapor deposition (CVD) from titanium alkoxide precursors. 4,6 To minimize the interface reactions, reduction of the deposition temperature is of importance, but this may increase the carbon contamination level.…”

In situ Raman characterization of CeO2 thin films sputtered on (111) Si in order to optimize the post growth annealing parameters

“…Cubic fluorite CeO 2 has an excellent lattice matching with silicon (misfit factor of 0.35%), so it is expected to be one of the promising buffer layers that combine silicon and various oxides exhibiting superior properties such as high-Tc superconductivity [1,13] or ferroelectricity [14]. Also, due to its relatively high dielectric constant (%26), CeO 2 was known for being a good candidate as the ultra thin gate-insulating layer on Si, which was expected to enable the scaling down of the silicon based devices [15][16][17]. Recently, cerium oxide has drawn a lot of attention, because of its technological importance in catalysis [18].…”