Signal Integrity Design and Analysis of 3-D X-Point Memory Considering Crosstalk and IR Drop for Higher Performance Computing

Son, Kyungjune; Cho, Kyungjun; Kim, Subin; Park, Shinyoung; Jung, Daniel; Park, Junyong; Park, Gapyeol; Kim, Seongguk; Shin, Taein; Kim, Youngwoo; Kim, Joungho

doi:10.1109/tcpmt.2020.2984268

“…First, current on the shortest path is higher for smaller process nodes. This is because, with technology scaling, the value of parasitic resistances along the bitline and wordline of a current path increases [38], [43], [44]. The unit wordline (bitline) parasitic resistance ranges from approximately 2.5Ω (1Ω) at 65nm node to 10Ω (3.8Ω) at 16nm node.…”

Section: Analyzing Technology-specific Current Asymmetry In Memristiv...mentioning

confidence: 99%

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Titirsha

¹

,

Song

²

,

Das

³

et al. 2022

IEEE Trans. Parallel Distrib. Syst.

View full text Add to dashboard Cite

Neuromorphic computing systems are embracing memristors to implement high density and low power synaptic storage as crossbar arrays in hardware. These systems are energy efficient in executing Spiking Neural Networks (SNNs). We observe that long bitlines and wordlines in a memristive crossbar are a major source of parasitic voltage drops, which create current asymmetry. Through circuit simulations, we show the significant endurance variation that results from this asymmetry. Therefore, if the critical memristors (ones with lower endurance) are overutilized, they may lead to a reduction of the crossbar's lifetime. We propose eSpine, a novel technique to improve lifetime by incorporating the endurance variation within each crossbar in mapping machine learning workloads, ensuring that synapses with higher activation are always implemented on memristors with higher endurance, and vice versa. eSpine works in two steps. First, it uses the Kernighan-Lin Graph Partitioning algorithm to partition a workload into clusters of neurons and synapses, where each cluster can fit in a crossbar. Second, it uses an instance of Particle Swarm Optimization (PSO) to map clusters to tiles, where the placement of synapses of a cluster to memristors of a crossbar is performed by analyzing their activation within the workload. We evaluate eSpine for a state-of-the-art neuromorphic hardware model with phase-change memory (PCM)-based memristors. Using 10 SNN workloads, we demonstrate a significant improvement in the effective lifetime.

show abstract

“…The conductance values of parameters in a PCM cell listed in Table III. In this work, we adopt the RESET current (I RESET ) of 100µA with RESET Time (t RESET ) of 15ns, and SET time (t SET ) of 80ns with the assumption of SET current (I SET ) of 50µA (= I RESET 2 ) [7], [8].…”

Section: Supplementary Materials a Pcm Parametersmentioning

confidence: 99%

“…The operation and performance of 3D XPoint as a memory unit are discussed in [7]- [11]. In our work, rather than focusing again on the memory aspects of 3D XPoint, we explore the possibility of exploiting 3D XPoint arrays to perform inmemory computation.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Exploring the Feasibility of Using 3-D XPoint as an In-Memory Computing Accelerator

Zabihi

¹

,

Resch

²

,

Cılasun

³

et al. 2021

IEEE J. Explor. Solid-State Comput. Devices Circuits

View full text Add to dashboard Cite

This paper describes how 3D XPoint memory arrays can be used as in-memory computing accelerators. We first show that thresholded matrix-vector multiplication (TMVM), the fundamental computational kernel in many applications including machine learning, can be implemented within a 3D XPoint array without requiring data to leave the array for processing. Using the implementation of TMVM, we then discuss the implementation of a binary neural inference engine. We discuss the application of the core concept to address issues such as system scalability, where we connect multiple 3D XPoint arrays, and power integrity, where we analyze the parasitic effects of metal lines on noise margins. To assure power integrity within the 3D XPoint array during this implementation, we carefully analyze the parasitic effects of metal lines on the accuracy of the implementations. We quantify the impact of parasitics on limiting the size and configuration of a 3D XPoint array, and estimate the maximum acceptable size of a 3D XPoint subarray.

show abstract

“…First, current on the shortest path is higher for smaller process nodes. This is because, with technology scaling, the value of parasitic resistances along the bitline and wordline of a current path increases [44], [49], [50]. The unit wordline (bitline) parasitic resistance ranges from approximately 2.5Ω (1Ω) at 65nm node to 10Ω (3.8Ω) at 16nm node.…”

Section: Analyzing Technology-specific Current Asymmetry In Memristiv...mentioning

confidence: 99%

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Titirsha¹,

Song²,

Das³

et al. 2021

Preprint

0

View full text Add to dashboard Cite

Neuromorphic computing systems are embracing memristors to implement high density and low power synaptic storage as crossbar arrays in hardware. These systems are energy efficient in executing Spiking Neural Networks (SNNs). We observe that long bitlines and wordlines in a memristive crossbar are a major source of parasitic voltage drops, which create current asymmetry. Through circuit simulations, we show the significant endurance variation that results from this asymmetry. Therefore, if the critical memristors (ones with lower endurance) are overutilized, they may lead to a reduction of the crossbar's lifetime. We propose eSpine, a novel technique to improve lifetime by incorporating the endurance variation within each crossbar in mapping machine learning workloads, ensuring that synapses with higher activation are always implemented on memristors with higher endurance, and vice versa. eSpine works in two steps. First, it uses the Kernighan-Lin Graph Partitioning algorithm to partition a workload into clusters of neurons and synapses, where each cluster can fit in a crossbar. Second, it uses an instance of Particle Swarm Optimization (PSO) to map clusters to tiles, where the placement of synapses of a cluster to memristors of a crossbar is performed by analyzing their activation within the workload. We evaluate eSpine for a state-of-the-art neuromorphic hardware model with phase-change memory (PCM)-based memristors. Using 10 SNN workloads, we demonstrate a significant improvement in the effective lifetime.

show abstract

Signal Integrity Design and Analysis of 3-D X-Point Memory Considering Crosstalk and IR Drop for Higher Performance Computing

Cited by 13 publications

References 25 publications

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Exploring the Feasibility of Using 3-D XPoint as an In-Memory Computing Accelerator

Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware

Contact Info

Product

Resources

About