Sigma-delta modulators with multibit quantising elements and single-bit feedback

Leslie, T.C.; Singh, B. B.

doi:10.1049/ip-g-2.1992.0058

Cited by 12 publications

(2 citation statements)

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“…The DAC can use less levels than the ADC thanks to the Leslie-Sing [1] approach or the truncation and cancellation method that, as shown in Fig. 1, uses a digital Σ∆ that reduces the number of bits by shaping the truncation error by (1 − z −1 ) k .…”

Section: Dac Resolution Reductionmentioning

confidence: 99%

Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters

Maloberti

2006

2006 IEEE North-East Workshop on Circuits and Systems

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Section: Dac Resolution Reductionmentioning

confidence: 99%

Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters

Maloberti

2006

2006 IEEE North-East Workshop on Circuits and Systems

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“…The errors due to the DAC nonlinearity remain unshaped and enter the modulator at its input and will degrade the resolution of the AZ modulator. Consequently, the signal-to-noise ratio suffers from the quantization nonlinearity due to the multi-bit [38]. For multi-bit quantizer, the errors contain not only the unavoidable inherent quantization noise but also other errors such as offset, gain or non-linearity and so on [39].…”

Section: Figure 213 a Multibit Az Modulatormentioning

confidence: 99%

Design of multi-standard and wideband delta-sigma modulator

Du¹

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support to my research. It is a great opportunity to study and work with their supervision. In addition, I would like to thank the members of my thesis examination committee for their time and feedback to improve the quality of my thesis.I also want to thank the members of my laboratory mates for their helping on technical problems for my project. Thanks to my friends in Center of Integrated Circuits and Systems (CICS). I appreciate the friendships and support from them. Thanks to CICS for workstation of CADENCE and Nan YangTechnological University for funding this project.Finally, I am very grateful to my family for their encouragement, understanding and moral support, which made this work into a completed endeavor. Especially, I would like to express my deep appreciation to my husband, Wang KaiFei who has accompanied me with his strong encouragement and support in these years. I also thank my daughter YaXin for the joy she has added to my life.

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Delta-sigma modulators using frequency-modulated intermediate values

Høvin

Olsen

Lande

et al. 1997

IEEE J. Solid-State Circuits

163

119

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This paper describes a new first-and second-order delta-sigma modulator concept where the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input. The result is a simple delta-sigma modulator with no need for digital-to-analog converters, allowing straightforward multi-bit quantization. Without the frequency modulator, the circuit becomes a frequency-to-digital converter with delta-sigma noise shaping. An experimental first-and second-order modulator have been implemented in a 1.2-¼m standard digital CMOS process and the results confirm the theory. For the first-order modulator an input signal amplitude of 150mV resulted in a SQNR of ³115dB at 2MHz sampling frequency and signal bandwidth 500Hz.

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Sigma-delta modulators with multibit quantising elements and single-bit feedback

Cited by 12 publications

References 1 publication

Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters

Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters

Design of multi-standard and wideband delta-sigma modulator

Delta-sigma modulators using frequency-modulated intermediate values

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