Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters

Maloberti, Franco

doi:10.1109/newcas.2006.250894

Cited by 6 publications

(5 citation statements)

References 5 publications

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“…However, increasing the integrator output swing also increases power dissipation [2,7]. Therefore, in most situations, the integrator output swing must be set as a compromise between SNR and power dissipation.…”

Section: Coefficient Scalingmentioning

confidence: 99%

“…For each set of c coefficients, a new set of a, g and b coefficients implementing the same desired NTF and STF can be found. Therefore, these coefficients can be optimized to implement the desired NTF and STF, based on one or several criteria such as the voltage swing at the output of each integrator [1], power consumption [2], SNR [3,4], etc.…”

Section: Introductionmentioning

confidence: 99%

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A new optimization technique for coefficient scaling in sigma-delta modulators

Collard-Frechette

Gagnon

2010

2010 53rd IEEE International Midwest Symposium on Circuits and Systems

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This article proposes a new method for scaling the output swing of the integrators in a sigma-delta modulator. The algorithm takes in consideration the relative effect on the output signal-to-noise ratio of the thermal noise from each integrator to find a set of coefficients which implements the desired transfer functions while reducing the signal swing at each node. Simulation results show that the last two integrators output swing can be reduced by 50% and 90% respectively for a 0.5 dB signal-to-noise ratio reduction.

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Section: Coefficient Scalingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A new optimization technique for coefficient scaling in sigma-delta modulators

Collard-Frechette

Gagnon

2010

2010 53rd IEEE International Midwest Symposium on Circuits and Systems

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“…The ADC consumes only 1.56mW from a 1.2V power supply and provides 9-bit performance for -6dB input level. This corresponds to a figure of merit of 0.75pJ, as defined in [21].…”

Section: Circuit Implementationmentioning

confidence: 99%

A Wide-band 2-path cross-coupled sigma delta ADC

Bilhan

Maloberti

2008

2008 IEEE International Symposium on Circuits and Systems (ISCAS)

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Abstract-The performance of a sigma-delta ADC can be increased by increasing one or more of the main three parameters, over-sampling ratio, the order of the modulators and the number of bits used. Increasing each of these parameters presents a degree of challenge (i.e., the increase in the over-sampling ratio is limited by the technology and the power consumption requirement). This paper presents a new method to obtain 2 nd order noise shaping from two 1 st order, time interleaved modulators by applying cross-coupling of quantization noise between the two paths. The proposed sigmadelta ADC is implemented in 90nm CMOS technology.

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“…A bulk-compensated class-C inverter is implemented in 0.13 mm CMOS mixed-signal process. Compared to traditional class-C inverters, the sensitivity of the proposed inverter to process variation is greatly reduced.Introduction: The portable electronics market requires ultra-low-power IC design, which poses significant challenges [1,2]. Recently, an inverter-based circuit has attracted widespread attention.…”

mentioning

confidence: 99%

“…Introduction: The portable electronics market requires ultra-low-power IC design, which poses significant challenges [1,2]. Recently, an inverter-based circuit has attracted widespread attention.…”

mentioning

confidence: 99%