Bulk-compensated technique and its application to subthreshold ICs

Luo, Haipeng; Han, Yi; Cheung, Ray C. C.; Han, Xiaoyu; Zhu, Dong Mei

doi:10.1049/el.2010.0559

Cited by 14 publications

(4 citation statements)

References 4 publications

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“…As mentioned above, a voltage difference between two ends of pseudo-resistor PR 2 is about a few decade microvolts. By adopting a BC circuit proposed by Hao [31], as shown in Figure 9, the bulk voltage of M 5 is decreased; thus, its threshold voltage is decreased. Because the current across M 5 is constant, the gate voltage of M 5 increases to offset the difference voltage between the two ends of PR 2 .…”

Section: Bulk-compensated Circuitsmentioning

confidence: 99%

A Robust 4-channel Micro-power Low-noise Neural Recording Amplifier for Hippocampal Cognitive Prosthesis

Ni¹,

Han²,

Lei³

et al. 2020

Preprint

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Background: Recording of electrical activity of neurons is indispensable for decoding the information in the brain. The amplitude of signals recorded by electrodes is small, and it must be amplified to the level that can be digitalized by the analog-to-digital convert (ADC). A micro-power low-noise neural recording amplifier is indispensable for implant hippocampal cognitive prosthesis. When the process turns into deep submicron, the gate leakage current of the metal oxide semiconductor (MOS) transistor becomes larger and mismatch between devices becomes worsen. It is necessary to keep the neural amplifier robust in all process corners. Methods: The proposed circuit is a two-stage amplifier which can achieve a good trade-off between power consumption and noise. Four second-stage amplifiers share a common reference amplifier to reduce area and power consumption. A pseudo-resistor with high resistance is utilized to realize a very-low frequency high pass corner without external components. In order to minimize process variation, a bulk-compensated (BC) technique is adopted to maintain adequate tolerance in all corner case. Results: The 4-channel neural amplifier is designed and fabricated in a 40 nm standard complementary metal oxide semiconductor (CMOS) process. It achieves a mid-band gain of 54 dB, a bandwidth of 70 Hz to 7.7 kHz, a total input-referred noise of 3.2 μVrms , and a Noise Efficiency Factor (NEF) of 3.3 while consuming 4.68 µW from the 1.1 V supply. The core area of one channel is only 0.032 mm 2 . Conclusion: A 4-channel integrated neural recording amplifier chip with bias-compensated circuits is presented in this paper. Extensive simulations insure that the design is “center”. The chip layout is verified using design rules check (DRC) and layout versus schematic (LVS) design check with the help of verification tools. Test results shows that it is less sensitive to process variation and consumes less power compared with amplifier without bulk-compensated circuit. This makes the design robust and uniquely appropriate for low-power implant application.

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Section: Bulk-compensated Circuitsmentioning

confidence: 99%

A Robust 4-channel Micro-power Low-noise Neural Recording Amplifier for Hippocampal Cognitive Prosthesis

Ni¹,

Han²,

Lei³

et al. 2020

Preprint

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show abstract

“…Because of its sub-threshold characteristics and push-pull structure, the proposed class-C inverter is sensitive to process and supply voltage (V DD ) variations [7]. In particular, when a slow process corner or low V DD is encountered, the transconductor and the drain current of M1 and M2 are reduced, which critically degrades the inverter bandwidth and slew rate (SR), leading to potential loss of function in inverter-based circuits.…”

Section: Gain-boost Class-c Invertermentioning

confidence: 99%

A low-power inverter-based ΣΔ analog-to-digital converter for audio applications

Liu

Han

et al. 2013

Sci. China Inf. Sci.

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“…Pseudo differential topology is adopted to improve the performance of the integrator. To reduce the variation of transconductance across all process corners, a method of biasing the bulk of the transistor is employed [4]. An auxiliary circuit with off chip resistive load is meant to sense the corner indirectly by reading the quiescent current.…”

Section: Introductionmentioning

confidence: 99%

A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications

Jagadish

Bhat

2014

2014 Fifth International Symposium on Electronic System Design

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A low voltage and low power inverter based differential amplifier is presented. The input stage is fully differential in operation and the output stage employ class C inverter to enhance the gain. An on-chip body bias improves the slew rate performance. The amplifier is implemented in UMC 90 nm technology. With load capacitance of 100fF, the amplifier delivers DC gain of 81dB and unity gain bandwidth of 33.88MHz at 41 • phase margin. For a dual power supply voltage of ±350mV, the quiescent current and power consumption are 2.37μA and 1.66μW respectively. The amplifier achieves a figure of merit of 2117. With the bulk of all the transistors slightly forward biased by a fixed bias potential, the power dissipation of 672nW and figure of merit of 5431 are achieved.

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Bulk-compensated technique and its application to subthreshold ICs

Cited by 14 publications

References 4 publications

A Robust 4-channel Micro-power Low-noise Neural Recording Amplifier for Hippocampal Cognitive Prosthesis

A Robust 4-channel Micro-power Low-noise Neural Recording Amplifier for Hippocampal Cognitive Prosthesis

A low-power inverter-based ΣΔ analog-to-digital converter for audio applications

A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications

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