SiGe W-CDMA transmitter for mobile terminal application

Malhi, D.S.; Joba, Hiroyuki; Demirdag, C.; Takahashi, Yoshiaki; Wang, D.; Matsunami, Yukitoshi; Larson, L.E.; Shinjo, Shintaro; Gao, Weihong; Suematsu, Noriharu; Glasser, J.-M.; Chominski, P.; Pereira, Vinícius M.; Prestia, L.; Schelkle, K.; Bacon, P.; Itoh, Kenji; Comfort, J.H.

doi:10.1109/bipol.2002.1042912

Cited by 5 publications

(3 citation statements)

References 7 publications

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“…In order to compare the present work with the state of the art, a number of publications concerning VGAs have been considered. The main characteristics of the proposed circuit, as well as that of the designs cited in [3,4], are summarized in Table IV. With respect to these designs, the amplifier described in this article achieves the highest frequency of operation with a fully integrated matching network.…”

Section: Comparison With the State Of The Artmentioning

confidence: 99%

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A 3-V variable-gain amplifier in Si/SiGe BiCMOS technology for 5-GHz WLAN applications

Alimenti¹,

Palazzari²,

Roselli³

et al. 2005

Int J RF and Microwave Comp Aid Eng

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A variable-gain class-A amplifier for 5-GHz wireless local area networks (WLAN) applications is developed using commercial 0.35-m Si/SiGe BiCMOS technology. The amplifier is based on a cascode differential pair and is fully integrated with input and output matching networks. The design starts with application of the Cripps' method and it is further refined by nonlinear harmonic-balance simulations. These simulations are in good agreement with the measurements carried out at wafer level on a realized prototype.

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Section: Comparison With the State Of The Artmentioning

confidence: 99%

“…Several papers on SiGe-based VGAs have been published in the last few years. In [3], an integrated transmitter for the 1.95-GHz frequency band was developed. The VGA adopted in the RF chain offers a 30-dB gain-control range and 18 dB of maximum gain.…”

Section: Introductionmentioning

confidence: 99%

A 3-V variable-gain amplifier in Si/SiGe BiCMOS technology for 5-GHz WLAN applications

Alimenti¹,

Palazzari²,

Roselli³

et al. 2005

Int J RF and Microwave Comp Aid Eng

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“…Super heterodyne and direct conversion architectures are widely used in wireless transmitters. The former provides superior in-phase/quadrature (I/Q) matching, low local oscillator (LO) leakage, and high linearity with a wide-range gain control [1]. However, off-chip surface acoustic wave (SAW) filters are required for both image rejection, as well as removing spurious harmonics at the output.…”

Section: Introductionmentioning

confidence: 98%

A Linear $\Sigma$–$\Delta$ Digital IF to RF DAC Transmitter With Embedded Mixer

Taleie

Copani

Bakkaloglu

et al. 2008

IEEE Trans. Microwave Theory Techn.

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A noise-shaped direct digital IF to RF (DIF2RF) DAC with embedded upconverter mixer is presented. The digital IF signal is noise shaped by a bandpass 6-1 modulator with 1-bit IF output followed by a semidigital finite impulse response (FIR) filter. The current mode FIR filter combines scaled values of the local oscillator (LO) signal for performing reconstruction filtering and upconversion in a single module. The DIF2RF design modulates the digital IF signal with a digital LO signal. This topology eliminates the transconductance nonlinearity of conventional mixers and is inherently linear due to single-bit digital IF input. The presented architecture reduces clock jitter sensitivity of 1-bit DACs by masking IF clock transitions with LO signals. A prototype of the DIF2RF DAC is designed and fabricated in a five-layer metal 0.25-m digital CMOS process. The architecture can be used in low-power software-defined digital-IF transmitters. The DIF2RF DAC consumes 49 mA from a 2.5-V supply, achieving 64.7-dBc third-order intermodulation at 1.03 GHz with a spurious-free dynamic range of 72 dB in a 15-MHz bandwidth.

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