2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) 2013
DOI: 10.1109/hst.2013.6581579
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Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise

Abstract: Abstract-Physically Unclonable Functions (PUFs) are emerging as hardware security primitives. For so-called strong PUFs, the number of challenge-response pairs (CRPs) increases exponentially with the required chip area in the ideal case. They can provide a mechanism to authenticate chips which is inherently unique for every manufactured sample. Modeling of the CRP behavior through Machine Learning (ML) has shown to be a threat however. In this paper, we exploit repeatability imperfections of PUF responses as a… Show more

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Cited by 127 publications
(76 citation statements)
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“…This fact theoretically supports the common assumption [6,14] about Gaussian delay values in Arbiter PUF research.…”
Section: Arbiter Chain Stabilitysupporting
confidence: 73%
See 4 more Smart Citations
“…This fact theoretically supports the common assumption [6,14] about Gaussian delay values in Arbiter PUF research.…”
Section: Arbiter Chain Stabilitysupporting
confidence: 73%
“…Note that this model does not make any assumptions about distribution or model of ∆D Model (c). Delvaux and Verbauwhede [6] were the first to propose this model.…”
Section: Noise Modelmentioning
confidence: 99%
See 3 more Smart Citations