2016 IEEE Symposium on VLSI Technology 2016
DOI: 10.1109/vlsit.2016.7573359
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Si FinFET based 10nm technology with multi Vt gate stack for low power and high performance applications

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Cited by 46 publications
(14 citation statements)
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“…In conventional CMOS technology, substitutional doping using ion implantation is the method of choice for controllably doping selected areas of the semiconductor wafer (either Si, Ge or III-Vs) to fabricate complementary FETs and realize complex circuits with desired performances. The ion implantation technique is also used to selectively and degenerately dope the S/D regions of the FET to realize Ohmic n-and p-type contacts for NMOS (i.e., n + -p-n + ) and PMOS (i.e., p + -n-p + ) device configurations, respectively, as well as to realize various bipolar devices, such as LEDs and photodetectors, for optoelectronic applications [207,[363][364][365][366][367][368][369][370][371][372][373][374][375]. The ion implantation process is known to induce surface damage and amorphization in the as-implanted semiconductor crystals which requires further annealing to "activate" the implanted dopants and to minimize residual damage [170,[376][377][378][379][380][381].…”
Section: Substitutional Doping Of 2d Mosmentioning
confidence: 99%
“…In conventional CMOS technology, substitutional doping using ion implantation is the method of choice for controllably doping selected areas of the semiconductor wafer (either Si, Ge or III-Vs) to fabricate complementary FETs and realize complex circuits with desired performances. The ion implantation technique is also used to selectively and degenerately dope the S/D regions of the FET to realize Ohmic n-and p-type contacts for NMOS (i.e., n + -p-n + ) and PMOS (i.e., p + -n-p + ) device configurations, respectively, as well as to realize various bipolar devices, such as LEDs and photodetectors, for optoelectronic applications [207,[363][364][365][366][367][368][369][370][371][372][373][374][375]. The ion implantation process is known to induce surface damage and amorphization in the as-implanted semiconductor crystals which requires further annealing to "activate" the implanted dopants and to minimize residual damage [170,[376][377][378][379][380][381].…”
Section: Substitutional Doping Of 2d Mosmentioning
confidence: 99%
“…The AC performance will be 20%-30% better in speed and 30%-50% better in power, as demonstrated with the various library sets shown in Fig. 13b [73,74] .…”
Section: Progress Of the Mainstream Industrymentioning
confidence: 83%
“…Finally, NSFET can be resolved most problems and difficulties which are FinFET faced such as continuous scaling down (Fig. 2), short channel regression, manufacturing challenges and itself device performance was limited [14][15][16].…”
Section: ‫النانوية‬ ‫الصفائح‬ ‫ترانزستورات‬ ‫تقنية‬ ‫حول‬ ‫مقال‬mentioning
confidence: 99%