1987
DOI: 10.1016/s0168-583x(87)80071-x
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Shallow junctions by ion implantation and rapid thermal annealing

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Cited by 29 publications
(4 citation statements)
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“…A band of dislocation loops forms near the original amorphous/crystalline (a/c) interface during annealing [3]. For many device structures these defects will lie within depletion regions and consequently impair device performance [4]. We have proposed that the dislocation loops arise from excess self-interstitials (Si recoils) trapped and condensed into extra planes of atoms just beyond the original a/c interface [ 5 ] .…”
Section: Introductionmentioning
confidence: 99%
“…A band of dislocation loops forms near the original amorphous/crystalline (a/c) interface during annealing [3]. For many device structures these defects will lie within depletion regions and consequently impair device performance [4]. We have proposed that the dislocation loops arise from excess self-interstitials (Si recoils) trapped and condensed into extra planes of atoms just beyond the original a/c interface [ 5 ] .…”
Section: Introductionmentioning
confidence: 99%
“…1,2 If the high-energy implant has to be restricted only to certain regions of the wafer, part of the wafer must be covered with a masking material to block the implanted ions. 1,2 If the high-energy implant has to be restricted only to certain regions of the wafer, part of the wafer must be covered with a masking material to block the implanted ions.…”
Section: Introductionmentioning
confidence: 99%
“…The requirement for shallow junction formation has arisen as device dimensions shrink into the submicron regime for higher packing densities and faster device switching speeds (1,2). Shallow junctions are generally formed by a low-energy ion implantation followed by low thermal budget processing (3) using rapid thermal annealing (RTA) at high temperature for short time or low-temperature furnace annealing.…”
mentioning
confidence: 99%