Roles of Extended Defect Evolution on the Anomalous Diffusion of Boron in Si during Rapid Thermal Annealing

Kim, Y. M.; Lo, G. Q.; Kinoshita, Hiroyuki; Kwong, Dim‐Lee; Tseng, Hsing‐Huang; Hance, R. L.

doi:10.1149/1.2085728

Cited by 44 publications

(2 citation statements)

References 35 publications

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“…[1][2][3][4][5] Interface-trap concentration along the surface channel increases during transistor operation, which compromises the transistor reliability. Due to the technical importance, extensive researches have been undertaken to characterize the interfacial electronic traps at the SiO 2 / Si interface in order to delineate their microscopic origins.…”

Section: High Concentration Effects Of Neutral-potential-well Interfamentioning

confidence: 99%

High concentration effects of neutral-potential-well interface traps on recombination dc current-voltage lineshape in metal-oxide-silicon transistors

Chen

Jie

Sah

2008

Journal of Applied Physics

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Articles you may be interested inEnergy distribution of interface traps in germanium metal-oxide-semiconductor field effect transistors with HfO 2 gate dielectric and its impact on mobility Appl. Phys. Lett. 93, 083510 (2008); 10.1063/1.2976632Effects of energy distribution of interface traps on recombination dc current-voltage line shape Theoretical accuracy of using Boltzmann and ionized impurity approximations in the analyses of recombination current at interface traps in metal-oxide-silicon structures Electroluminescence and photoluminescence studies on carrier radiative and nonradiative recombinations in metal-oxide-silicon tunneling diodes Wave function penetration effects on current-voltage characteristics of ballistic metal-oxide-semiconductor transistors Steady-state Shockley-Read-Hall kinetics is employed to explore the high concentration effect of neutral-potential-well interface traps on the electron-hole recombination direct-current current-voltage ͑R-DCIV͒ properties in metal-oxide-silicon field-effect transistors. Extensive calculations include device parameter variations in neutral-trapping-potential-well electron interface-trap density N ET ͑charge states 0 and −1͒, dopant impurity concentration P IM , oxide thickness X ox , forward source/drain junction bias V PN , and transistor temperature T. It shows significant distortion of the R-DCIV lineshape by the high concentrations of the interface traps. The result suggests that the lineshape distortion observed in past experiments, previously attributed to spatial variation in surface impurity concentration and energy distribution of interface traps in the silicon energy gap, can also arise from interface-trap concentration along surface channel region.

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Section: High Concentration Effects Of Neutral-potential-well Interfamentioning

confidence: 99%

High concentration effects of neutral-potential-well interface traps on recombination dc current-voltage lineshape in metal-oxide-silicon transistors

Chen

Jie

Sah

2008

Journal of Applied Physics

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“…The activation energy of this phenomena is almost the sqne as that of the TED saturation. Kim et al showed experimentally that TED saturates when the dislocation loop disappears [4]. In addition, Liu et al experimentally indicate the extended defects, a dislocation loop, dissolve during the annealing, resulting in the emission of the free interstitial silicon [5].…”

Section: Introductionmentioning

confidence: 99%

TED model including the dissolution of extended defects

Kamohara

Shimizu²,

Yamamoto³

et al.

1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)

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Silicon Device Processing

Kwong

2013

Materials Science and Technology

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The sections in this article are Introduction Gettering Intrinsic Gettering Gettering by Hydrogen Annealing Device Isolation LOCOS ‐Based Isolation Advanced Isolation Techniques Silicon‐on‐Insulator Gate Dielectrics Preoxidation Cleaning Process Dependence of Gate Oxide Quality Chemically Modified Gate Oxides CVD and Stacked Oxides Shallow Junction Formation Ion Implantation Advanced Techniques for p + ‐ n Junction Formation Diffusion from Doped Deposited Layers Gas Immersion Laser Doping Gas Phase Diffusion Plasma Immersion Ion Implantation Metallization Gate Electrodes Contacts Interconnections Planarization for Multilevel Interconnections Cluster Tool Technology Advantages Rapid Thermal Processing In Situ Dry Cleaning Interface Engineering Gate Stack of Oxide and Oxynitride Deposition of DRAM Storage Dielectrics Selective Deposition Processes Ultra‐Shallow Junction Formation Integrated CMOS Processing Based on RTP Ge x Si 1− x / Si Heteroepitaxy by RT ‐ CVD Single‐Wafer Integrated Processing

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Roles of Extended Defect Evolution on the Anomalous Diffusion of Boron in Si during Rapid Thermal Annealing

Cited by 44 publications

References 35 publications

High concentration effects of neutral-potential-well interface traps on recombination dc current-voltage lineshape in metal-oxide-silicon transistors

High concentration effects of neutral-potential-well interface traps on recombination dc current-voltage lineshape in metal-oxide-silicon transistors

TED model including the dissolution of extended defects

Silicon Device Processing

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