SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics

Meng, Xingyu; Raj, Kshitij; Ray, Sandip; Basu, Kanad

doi:10.1109/tcad.2022.3179307

Cited by 6 publications

(4 citation statements)

References 40 publications

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“…They also implement a source-destination path randomization to further improve security. The authors in [18], implement a detection algorithm that detects changes in traffic communication to identify hostile IC's in the NOC. [19] has the authors make and subvert three types of trojan attacks.…”

Section: Related Workmentioning

confidence: 99%

Address Obfuscation to Protect against Hardware Trojans in Network-on-Chips

Mountford,

Dhavlle,

Tevebaugh

et al. 2023

JLPEA

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In modern computing, which relies on the interconnection of networks used in many/multi-core systems, any system can be critically subverted if the interconnection is compromised. This can be done in a multitude of ways, but the threat of a hardware Trojan (HT) being injected into a system is particularly prevalent due to the increase in third-party manufacturers for system-on-chip (SoC) designs. With a local injection of an HT in an SoC, an adversary can gain access to information about applications running on the system by revealing specific communications of the SoC, and the network-on-chip (NoC) as a whole. This heavily compromises the system and gives information to the attacker, which can lead to more tailored, compromising attacks. In this paper, we demonstrate an HT that exploits communication patterns inside an SoC to reveal applications that are running on an NoC with multi/many-core processors. This is performed by leaking packet counts, after which the attacker then uses machine learning techniques to identify applications running on processors, and the SoC as a whole. We also propose a LUT-based obfuscation technique to limit the information available to the hardware Trojan. Our results indicate that this obfuscation method can reduce the accuracy of this attack from 99% to <8% in multi/many-core systems.

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Section: Related Workmentioning

confidence: 99%

Address Obfuscation to Protect against Hardware Trojans in Network-on-Chips

Mountford,

Dhavlle,

Tevebaugh

et al. 2023

JLPEA

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“…Meng et al [14] propose a framework for systematically detecting security violations in SoC designs resulting from vulnerabilities in NoC communication. The threat model includes message misdirection, message mutation, delivery prevention, and network congestion.…”

Section: Related Workmentioning

confidence: 99%

A Comprehensive Framework for Systemic Security Management in NoC-Based Many-Cores

Faccenda,

Comarú,

Caimi

et al. 2023

IEEE Access

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Many-core Systems-on-Chip (MCSoC) are increasingly used in various applications domains such as high-performance computing, embedded systems, and Internet of Things devices. As MCSoCs permeate various industries and applications, the potential consequences of security issues are becoming increasingly severe. Therefore, security is a fundamental design constraint, addressing vulnerabilities and protecting valuable data from threats. This requires the development of robust security mechanisms and countermeasures against potential threats. The reviewed works on security for MCSoCs addressed frameworks and mechanisms to treat different security threats. Despite these proposals, the integration of security mechanisms still needs to be improved, enabling a security manager to make decisions using monitoring data for mitigating threats more effectively. This integration is the primary goal of our work, aiming to create a comprehensive framework for security management. The framework adopts a Monitoring-Detection-Countermeasure loop. A distributed monitoring infrastructure detects suspicious behaviors, generating warnings to different system actors. These actors decide the warning severity, firing security countermeasures. Countermeasures may be local (e.g., discarding a packet) or taken at the system level (e.g., aborting a malicious application). The results use an MCSoC modeled at the RTL level, providing accuracy at the clock cycle (cc) level. Five different attack scenarios are evaluated, showing that the gap between attack detection and countermeasure takes less than one millisecond (15,000 cc at 100 MHz). The area overhead in the communication infrastructure corresponds to 48.8%. These results show that the framework can effectively manage the system's security while maintaining the performance of the applications.INDEX TERMS Countermeasures, Monitoring, NoC-based Many-cores, Security Framework.

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“…Work [20] proposes a security property validation method focusing on the communication fabrics of an SoC. It builds a CFG for each IP in the SoC and efficiently explores connections between various CFGs for any given security property.…”

Section: Related Workmentioning

confidence: 99%

Mining SoC Message Flows with Attention Model

Ahmed¹,

Bardia²,

Zheng³

2022

Preprint

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High-quality system-level message flow specifications are necessary for comprehensive validation of system-on-chip (SoC) designs. However, manual development and maintenance of such specifications are a daunting task. We propose a disruptive method that utilizes deep sequence modeling with the attention mechanism to infer accurate flow specifications from SoC communication traces. The proposed method can overcome the inherent complexity of SoC traces induced by the concurrent executions of SoC designs that existing mining tools often find extremely challenging. We conduct experiments on five highly concurrent traces and find that proposed approach outperforms several existing state-of-the-art trace mining tools.

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SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics

Cited by 6 publications

References 40 publications

Address Obfuscation to Protect against Hardware Trojans in Network-on-Chips

Address Obfuscation to Protect against Hardware Trojans in Network-on-Chips

A Comprehensive Framework for Systemic Security Management in NoC-Based Many-Cores

Mining SoC Message Flows with Attention Model

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