SEU-tolerant IQ detection algorithm for LLRF accelerator system

Grecki, M.

doi:10.1088/0957-0233/18/8/015

Cited by 3 publications

(3 citation statements)

References 28 publications

(18 reference statements)

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“…One of the method to provide the SEU tolerance is to introduce the redundancy into the circuit [5], [6]. The Triple Module Redundancy (TMR) is commonly used for that purpose.…”

Section: Seu Tolerant Circuitsmentioning

confidence: 99%

SEUs tolerance in FPGAs based digital LLRF system for XFEL

Grecki

2012

2012 18th IEEE-NPSS Real Time Conference

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Abstract-The rapidly developing semiconductor technology allows to implement sophisticated digital control in the programmable devices platforms (FPGAs, CPUs). However the increasing size and performance of the circuits has also a drawback at the failure sensitivity, in particular for soft errors due to ionizing radiation. The sensitivity to SEUs is related to the critical charge which strongly depends on the transistor dimensions and supplying voltage. The sensitivity to ionizing radiation increases faster than the circuits complexity due to Moore's law. Therefore the life critical systems and systems operating in radioactive environment have to deal with soft errors. The countermeasure can be special design techniques introducing the redundancy to the algorithms and/or circuit design allowing to detect and correct errors. The goal is to find the compromise between cost, performance and reliability. The development of such algorithms and systems must be supported by the test stand where the resistance to radiation influence can be evaluated. I. XFELE uropean X-Ray Free-Electron Laser (XFEL) will be driven by 1.6 km long linac consisting of 116 superconducting accelerator modules supplied by 29 RF stations [1]. The accelerator will provide electron beam with energy of 20GeV and average beam power 600kW. The energy spread must be better than 1MeV that means 0.005% regulation precision. The RF field regulation will be provided by sophisticated digital LLRF system. Due to dark currents (from possible field emission in the accelerator cavities) there will be a background radiation (gammas and neutrons) in the XFEL linac tunnel. It is expected that dark current of several microamperes can reach an energy of about 100 MeV before being dumped in the beam-line. Since the LLRF electronics will be installed at the same tunnel ( Fig. 1) together with beam pipe the generated radiation is expected to influence the electronic devices. M.Grecki is with Deutsches Elektronen-Synchrotron DESY, Hamburg, Germany (telephone: +49408998, e-mail: mariusz.grecki@desy.de).The ionizing radiation has a negative influence on electronic devices. It reduces the lifetime of the circuit and also can cause the temporary malfunction during circuit operation [3], [4], [5].The permanent effects are caused by excessive doses of radiation. Gamma photons cause charge accumulation in MOS gates that shifts the threshold voltage of the MOS transistor. The temporary effects (Single Event Effects -SEE) are caused by charged particles energetic enough to ionize the semiconductor by generating excessive electron/hole pairs [3]. The typical nuclear reaction of neutron and nucleus of boron 10 B (about 20% of boron commonly used as silicon dopant) creates α particle energetic enough to ionize the semiconductor on the way through (the typical range of α particles in silicon is several microns). Those ionized areas of semiconductor can conduct electric current until the excessive electric carriers recombine and thus random parts of the electronic circuits can be ...

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“…One of the method to provide the SEU tolerance is to introduce the redundancy into the circuit [5], [6]. The Triple Module Redundancy (TMR) is commonly used for that purpose.…”

Section: Seu Tolerant Circuitsmentioning

confidence: 99%

SEUs tolerance in FPGAs based digital LLRF system for XFEL

Grecki

2012

2012 18th IEEE-NPSS Real Time Conference

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“…1), high-frequency signals are down converted to intermediate frequency signals, then a relevant clock signal is chosen as the ADC sampling clock, and finally FPGA is used to calculate the amplitude and phase from the IQ sequence data. 2) Integer IF periods sampling [6] and the digital down converter method When f IFsignal /f ampling = 1/M (4 M ∈ N ) we can integrate using one period of the sampled IF data to average out the harmonics and get a lower noise level. The mathematic relation can be represented in Eq.…”

Section: Iq Detectionmentioning

confidence: 99%

“…2 demonstrates that the parallel hardware implementation makes M samples to one result, when the window moves with the clock we get the result for each period. For example, we can use a 100 MHz clock to sample the 1 MHz signal, which approximately makes the noise level one tenth compared with the common method [6] .…”

Section: Iq Detectionmentioning

confidence: 99%

FPGA-based amplitude and phase detection in DLLRF

et al. 2009

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The new generation particle accelerator requires a highly stable radio frequency (RF) system. The stability of the RF system is realized by the Low Level RF (LLRF) subsystem which controls the amplitude and phase of the RF signal. The detection of the RF signal's amplitude and phase is fundamental to LLRF controls. High-speed ADC (Analog to Digital Converter), DAC (Digital to Analog Converter) and FPGA (Field Programmable Gate Array) play very important roles in digital LLRF control systems. This paper describes the implementation of real-time amplitude and phase detection based of the FPGA with an analysis of the main factors that affect the detection accuracy such as jitter, algorithm's defects and non-linearity of devices, which is helpful for future work on high precision detection and control.

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