Sensing nanosecond-scale voltage attacks and natural transients in FPGAs

Abstract

Voltage noise not only detracts from reliability and performance, but has been used to attack system security. Most systems are completely unaware of fluctuations occurring on nanosecond time scales. This paper quantifies the threat to FPGA-based systems and presents a solution approach. Novel measurements of transients on 28nm FPGAs show that extreme activity in the fabric can cause enormous undershoot and overshoot, more than 10× larger than what is allowed by the specification. An existing voltage sensor is evaluated and shown to be insufficient. Lastly, a sensor design using reconfigurable logic is presented; its timeto-digital converter enables sample rates 500× faster than the 28nm Xilinx ADC. This enables quick characterization of transients that would normally go undetected, thereby providing potentially useful data for system optimization and helping to defend against supply voltage attacks.

Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter

“…Thus, for the purpose of monitoring the core voltage of an IC exposed to power glitches, we designed a delay-meter (the so-called voltmeter). Note that this technique has already been introduced and validated by K. Zick et al [4]. Fig.…”

“…in phase delay, with respect to clk. As a result, the outputs of the DFFs form an 8-bit vector, which depends on delay(V dd) ( [4], [10]). The right-hand side of Fig.…”

“…In this paper, we report the use of a digital delay-meter embedded in a programmable device (FPGA) as presented in [4] and [5] for the purpose of identifying the fault injection mechanism related to positive power supply glitches. It allowed us to monitor the core voltage of the device when exposed to positive and negative power supply glitches.…”

Noise monitoring method inside IC using full‐digital circuits under actual environment

“…The circuit proposed by Zick et al. delays cock signal by a buffer array, and the delay amount is used to estimate power supply voltage, Circuit delay time is known to depend on source voltage as shown below …”

Noise Monitoring Method Inside IC using Full-digital Circuits under Actual Environment

“…The circuit proposed by Zick et al delays cock signal by a buffer array, and the delay amount is used to estimate power supply voltage, 8 Circuit delay time is known to depend on source voltage as shown below. 9 delay ∝ 2 dd…”