Self-implantation energy and dose effects on Ge solid-phase epitaxial growth

Darby, B. L.; Yates, B. R.; Rudawski, Nicholas G.; Jones, K. S.; Kontos, A.

doi:10.1016/j.nimb.2010.10.009

Cited by 10 publications

(8 citation statements)

References 47 publications

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“…Moreover, the [001] SPEG velocity compared well with previous SPEG experiments in Ge, where no hairpin dislocations were observed. 22 This evidence supports the conclusion that the low density of hairpin dislocations did not contribute to the orientation dependence on SPEG for this work.…”

Section: Discussionsupporting

confidence: 88%

Substrate orientation dependence on the solid phase epitaxial growth rate of Ge

Darby

Yates

Martín-Bragado

et al. 2013

Journal of Applied Physics

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The solid phase epitaxial growth process has been studied at 330 C by transmission electron microscopy for Ge wafers polished at 10-15 increments from the [001] to [011] orientations. The velocity showed a strong dependence on substrate orientation with the [001] direction displaying a velocity 16 times greater than the [111] direction. A lattice kinetic Monte Carlo model was used to simulate solid phase epitaxial growth (SPEG) rates at different orientations, and simulations compared well with experimental results. Cross sectional transmission electron microscopy and plan view transmission electron microscopy revealed stacking fault and twin defect formation in the [111] orientation where all other orientations showed only hairpin dislocations. The twin defects formed from Ge SPEG were comparatively less dense than what has previously been reported for Si, which gave rise to higher normalized velocities and a constant [111] SPEG velocity for Ge. V

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Section: Discussionsupporting

confidence: 88%

Substrate orientation dependence on the solid phase epitaxial growth rate of Ge

Darby

Yates

Martín-Bragado

et al. 2013

Journal of Applied Physics

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“…(SPER) appears to be another solution [101]. Furthermore, SPER can be done with standard furnace tools.…”

Section: Access Resistance 51 Doping Optimisationmentioning

confidence: 99%

“…As the melting point of Ge is 937 • C, a low-temperature process such as solid-phase-epitaxial-regrowth (SPER) appears to be another solution [101]. Furthermore, SPER can be done with standard furnace tools.…”

Section: Access Resistance 51 Doping Optimisationmentioning

confidence: 99%

Processing of germanium for integrated circuits

Duffy¹,

Shayesteh²,

Yu³

2014

Turk J Phys

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Abstract:In this review paper the authors will focus on Ge processing for integrated circuits. The key areas that require the most attention are substrates and integration, gate dielectrics, and access resistance. We will discuss each of these topics in turn, while also reviewing the most scaled Ge field-effect-transistor devices, and consider how modelling activities have matured for Ge in recent years.

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“…However, in the case of Gebased devices, high-temperature annealing is not advisable. 25 Nowadays, solid-phase epitaxial growth, 26 electron, ash lamp, 27 laser 28 and swi heavy-ion (SHI) 29,30 irradiation are the most widely used methods for recrystallization of a-Ge due to their uniformity in depth distribution. The evolution of pre-damaged Ge and recrystallization behavior due to the effect of energetic ions at room temperature has been reviewed earlier by our group.…”

Section: Introductionmentioning

confidence: 99%