Self-aligned offset gate poly-Si TFTs using photoresist trimming technology

Abstract

This paper reports a simple method of fabricating self-aligned offset gate (SAOG) polycrystalline silicon (poly-Si) thin film transistors (TFTs). The SAOG structure was formed by two key steps, i.e. an isotropic photoresist trimming and an additional gate fringe etching. The fabricated SAOG devices with this proposed method exhibit a significantly suppressed off-current increase with gate bias compared with the non-offset ones, and have identical bi-directional transfer characteristics under reversed source/drain biases. It is also shown that the performances of poly-Si TFTs with metal-induced lateral crystallization can be improved significantly by annealing in forming gas.

Technology demonstration of a novel poly-Si nanowire thin film transistor

“…[5][6][7] The high anomalous leakage current generated by thermionic emission and tunneling via the grain boundaries deteriorates the power of the circuit and the display quality of the AM-FPD. [8,9] In addition, the existence of a pseudo-subthreshold regime in the above threshold regime further worsens the switching properties. [10] Fin field-effect transistors (FinFETs), with a multi-gate structure, have been extensively examined due to their superior gate controllability and electrical performance.…”